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author | Steven J. Hill <sjhill@mips.com> | 2012-05-30 21:02:49 (GMT) |
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committer | Steven J. Hill <sjhill@mips.com> | 2012-09-13 20:43:46 (GMT) |
commit | 3070033a16edcc21688d5ea8967c89522f833862 (patch) | |
tree | 48d1a4601dd4750d103bc0b02ff2494d75220321 /arch/mips/include/asm/mach-sead3/kernel-entry-init.h | |
parent | 006a851b10a395955c153a145ad8241494d43688 (diff) | |
download | linux-fsl-qoriq-3070033a16edcc21688d5ea8967c89522f833862.tar.xz |
MIPS: Add core files for MIPS SEAD-3 development platform.
More information about the SEAD-3 platform can be found at
<http://www.mips.com/products/development-kits/mips-sead-3/>
on MTI's site. Currently, the M14K family of cores is what
the SEAD-3 is utilised with.
Signed-off-by: Douglas Leung <douglas@mips.com>
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Diffstat (limited to 'arch/mips/include/asm/mach-sead3/kernel-entry-init.h')
-rw-r--r-- | arch/mips/include/asm/mach-sead3/kernel-entry-init.h | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-sead3/kernel-entry-init.h b/arch/mips/include/asm/mach-sead3/kernel-entry-init.h new file mode 100644 index 0000000..3dfbd8e --- /dev/null +++ b/arch/mips/include/asm/mach-sead3/kernel-entry-init.h @@ -0,0 +1,52 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Chris Dearman (chris@mips.com) + * Copyright (C) 2007 Mips Technologies, Inc. + */ +#ifndef __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H +#define __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H + + .macro kernel_entry_setup +#ifdef CONFIG_MIPS_MT_SMTC + mfc0 t0, CP0_CONFIG + bgez t0, 9f + mfc0 t0, CP0_CONFIG, 1 + bgez t0, 9f + mfc0 t0, CP0_CONFIG, 2 + bgez t0, 9f + mfc0 t0, CP0_CONFIG, 3 + and t0, 1<<2 + bnez t0, 0f +9 : + /* Assume we came from YAMON... */ + PTR_LA v0, 0x9fc00534 /* YAMON print */ + lw v0, (v0) + move a0, zero + PTR_LA a1, nonmt_processor + jal v0 + + PTR_LA v0, 0x9fc00520 /* YAMON exit */ + lw v0, (v0) + li a0, 1 + jal v0 + +1 : b 1b + + __INITDATA +nonmt_processor : + .asciz "SMTC kernel requires the MT ASE to run\n" + __FINIT +0 : +#endif + .endm + +/* + * Do SMP slave processor setup necessary before we can safely execute C code. + */ + .macro smp_slave_setup + .endm + +#endif /* __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H */ |