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author | Ralf Baechle <ralf@linux-mips.org> | 2007-07-14 12:24:05 (GMT) |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-07-20 17:57:39 (GMT) |
commit | 17099b1142f6c0359fca60a3464dea8fb30badea (patch) | |
tree | 26b9f3955dca84ccab594a76680c2a71e166768a /arch/mips | |
parent | ed203dadcd1373e80e95b04075e1eefc554a914b (diff) | |
download | linux-fsl-qoriq-17099b1142f6c0359fca60a3464dea8fb30badea.tar.xz |
[MIPS] Make support for weakly ordered LL/SC a config option.
None of weakly ordered processor supported in tree need this but it seems
like this could change ...
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/Kconfig | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 5c863bc..1e3aecc 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1190,8 +1190,19 @@ config SYS_HAS_CPU_RM9000 config SYS_HAS_CPU_SB1 bool +# +# CPU may reorder R->R, R->W, W->R, W->W +# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC +# config WEAK_ORDERING bool + +# +# CPU may reorder reads and writes beyond LL/SC +# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC +# +config WEAK_REORDERING_BEYOND_LLSC + bool endmenu # |