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author | Ingo Molnar <mingo@elte.hu> | 2009-06-17 10:52:15 (GMT) |
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committer | Ingo Molnar <mingo@elte.hu> | 2009-06-17 10:56:49 (GMT) |
commit | eadb8a091b27a840de7450f84ecff5ef13476424 (patch) | |
tree | 58c3782d40def63baa8167f3d31e3048cb4c7660 /arch/sh/include/asm/clock.h | |
parent | 73874005cd8800440be4299bd095387fff4b90ac (diff) | |
parent | 65795efbd380a832ae508b04dba8f8e53f0b84d9 (diff) | |
download | linux-fsl-qoriq-eadb8a091b27a840de7450f84ecff5ef13476424.tar.xz |
Merge branch 'linus' into tracing/hw-breakpoints
Conflicts:
arch/x86/Kconfig
arch/x86/kernel/traps.c
arch/x86/power/cpu.c
arch/x86/power/cpu_32.c
kernel/Makefile
Semantic conflict:
arch/x86/kernel/hw_breakpoint.c
Merge reason: Resolve the conflicts, move from put_cpu_no_sched() to
put_cpu() in arch/x86/kernel/hw_breakpoint.c.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/sh/include/asm/clock.h')
-rw-r--r-- | arch/sh/include/asm/clock.h | 113 |
1 files changed, 88 insertions, 25 deletions
diff --git a/arch/sh/include/asm/clock.h b/arch/sh/include/asm/clock.h index 2f6c962..9fe7d7f 100644 --- a/arch/sh/include/asm/clock.h +++ b/arch/sh/include/asm/clock.h @@ -1,9 +1,9 @@ #ifndef __ASM_SH_CLOCK_H #define __ASM_SH_CLOCK_H -#include <linux/kref.h> #include <linux/list.h> #include <linux/seq_file.h> +#include <linux/cpufreq.h> #include <linux/clk.h> #include <linux/err.h> @@ -11,9 +11,9 @@ struct clk; struct clk_ops { void (*init)(struct clk *clk); - void (*enable)(struct clk *clk); + int (*enable)(struct clk *clk); void (*disable)(struct clk *clk); - void (*recalc)(struct clk *clk); + unsigned long (*recalc)(struct clk *clk); int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id); int (*set_parent)(struct clk *clk, struct clk *parent); long (*round_rate)(struct clk *clk, unsigned long rate); @@ -28,43 +28,47 @@ struct clk { struct clk *parent; struct clk_ops *ops; - struct kref kref; + struct list_head children; + struct list_head sibling; /* node for children */ + + int usecount; unsigned long rate; unsigned long flags; + + void __iomem *enable_reg; + unsigned int enable_bit; + unsigned long arch_flags; + void *priv; + struct dentry *dentry; + struct cpufreq_frequency_table *freq_table; +}; + +struct clk_lookup { + struct list_head node; + const char *dev_id; + const char *con_id; + struct clk *clk; }; -#define CLK_ALWAYS_ENABLED (1 << 0) -#define CLK_RATE_PROPAGATES (1 << 1) +#define CLK_ENABLE_ON_INIT (1 << 0) /* Should be defined by processor-specific code */ -void arch_init_clk_ops(struct clk_ops **, int type); +void __deprecated arch_init_clk_ops(struct clk_ops **, int type); int __init arch_clk_init(void); /* arch/sh/kernel/cpu/clock.c */ int clk_init(void); - -void clk_recalc_rate(struct clk *); - +unsigned long followparent_recalc(struct clk *); +void recalculate_root_clocks(void); +void propagate_rate(struct clk *); +int clk_reparent(struct clk *child, struct clk *parent); int clk_register(struct clk *); void clk_unregister(struct clk *); -static inline int clk_always_enable(const char *id) -{ - struct clk *clk; - int ret; - - clk = clk_get(NULL, id); - if (IS_ERR(clk)) - return PTR_ERR(clk); - - ret = clk_enable(clk); - if (ret) - clk_put(clk); - - return ret; -} +/* arch/sh/kernel/cpu/clock-cpg.c */ +int __init __deprecated cpg_clk_init(void); /* the exported API, in addition to clk_set_rate */ /** @@ -96,4 +100,63 @@ enum clk_sh_algo_id { IP_N1, }; + +struct clk_div_mult_table { + unsigned int *divisors; + unsigned int nr_divisors; + unsigned int *multipliers; + unsigned int nr_multipliers; +}; + +struct cpufreq_frequency_table; +void clk_rate_table_build(struct clk *clk, + struct cpufreq_frequency_table *freq_table, + int nr_freqs, + struct clk_div_mult_table *src_table, + unsigned long *bitmap); + +long clk_rate_table_round(struct clk *clk, + struct cpufreq_frequency_table *freq_table, + unsigned long rate); + +int clk_rate_table_find(struct clk *clk, + struct cpufreq_frequency_table *freq_table, + unsigned long rate); + +#define SH_CLK_MSTP32(_name, _id, _parent, _enable_reg, \ + _enable_bit, _flags) \ +{ \ + .name = _name, \ + .id = _id, \ + .parent = _parent, \ + .enable_reg = (void __iomem *)_enable_reg, \ + .enable_bit = _enable_bit, \ + .flags = _flags, \ +} + +int sh_clk_mstp32_register(struct clk *clks, int nr); + +#define SH_CLK_DIV4(_name, _parent, _reg, _shift, _div_bitmap, _flags) \ +{ \ + .name = _name, \ + .parent = _parent, \ + .enable_reg = (void __iomem *)_reg, \ + .enable_bit = _shift, \ + .arch_flags = _div_bitmap, \ + .flags = _flags, \ +} + +int sh_clk_div4_register(struct clk *clks, int nr, + struct clk_div_mult_table *table); + +#define SH_CLK_DIV6(_name, _parent, _reg, _flags) \ +{ \ + .name = _name, \ + .parent = _parent, \ + .enable_reg = (void __iomem *)_reg, \ + .flags = _flags, \ +} + +int sh_clk_div6_register(struct clk *clks, int nr); + #endif /* __ASM_SH_CLOCK_H */ |