summaryrefslogtreecommitdiff
path: root/arch/sh/include/asm/cpu-features.h
diff options
context:
space:
mode:
authorDavid Howells <dhowells@redhat.com>2012-10-09 08:47:37 (GMT)
committerDavid Howells <dhowells@redhat.com>2012-10-09 08:47:37 (GMT)
commit0a9426df1858f71ac84eb7eef500b4247de5e3bb (patch)
tree82983766b53c18f5da8602f16ed0b67ae2a957fb /arch/sh/include/asm/cpu-features.h
parent9e2d8656f5e8aa214e66b462680cf86b210b74a8 (diff)
downloadlinux-fsl-qoriq-0a9426df1858f71ac84eb7eef500b4247de5e3bb.tar.xz
UAPI: (Scripted) Disintegrate arch/sh/include/asm
Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Michael Kerrisk <mtk.manpages@gmail.com> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com>
Diffstat (limited to 'arch/sh/include/asm/cpu-features.h')
-rw-r--r--arch/sh/include/asm/cpu-features.h26
1 files changed, 0 insertions, 26 deletions
diff --git a/arch/sh/include/asm/cpu-features.h b/arch/sh/include/asm/cpu-features.h
deleted file mode 100644
index 694abe4..0000000
--- a/arch/sh/include/asm/cpu-features.h
+++ /dev/null
@@ -1,26 +0,0 @@
-#ifndef __ASM_SH_CPU_FEATURES_H
-#define __ASM_SH_CPU_FEATURES_H
-
-/*
- * Processor flags
- *
- * Note: When adding a new flag, keep cpu_flags[] in
- * arch/sh/kernel/setup.c in sync so symbolic name
- * mapping of the processor flags has a chance of being
- * reasonably accurate.
- *
- * These flags are also available through the ELF
- * auxiliary vector as AT_HWCAP.
- */
-#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */
-#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */
-#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */
-#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */
-#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */
-#define CPU_HAS_PTEA 0x0020 /* PTEA register */
-#define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */
-#define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */
-#define CPU_HAS_OP32 0x0100 /* 32-bit instruction support */
-#define CPU_HAS_PTEAEX 0x0200 /* PTE ASID Extension support */
-
-#endif /* __ASM_SH_CPU_FEATURES_H */