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authorIngo Molnar <mingo@elte.hu>2008-12-24 20:08:26 (GMT)
committerIngo Molnar <mingo@elte.hu>2008-12-24 20:08:26 (GMT)
commitdb8862eafe8a5d030a3b02e81b8bb47447c315e3 (patch)
tree073ea7b46809bf804134cbf008a593413c02a99c /arch/x86/kernel/microcode_intel.c
parentc5dee6177f4bd2095aab7d9be9f6ebdddd6deee9 (diff)
parentc20137fc5329eaf24093fc48c52608dc66be8e5c (diff)
downloadlinux-fsl-qoriq-db8862eafe8a5d030a3b02e81b8bb47447c315e3.tar.xz
Merge branch 'linus' into tracing/hw-branch-tracing
Diffstat (limited to 'arch/x86/kernel/microcode_intel.c')
-rw-r--r--arch/x86/kernel/microcode_intel.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/x86/kernel/microcode_intel.c b/arch/x86/kernel/microcode_intel.c
index 622dc4a..a8e6279 100644
--- a/arch/x86/kernel/microcode_intel.c
+++ b/arch/x86/kernel/microcode_intel.c
@@ -155,6 +155,7 @@ static DEFINE_SPINLOCK(microcode_update_lock);
static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
{
struct cpuinfo_x86 *c = &cpu_data(cpu_num);
+ unsigned long flags;
unsigned int val[2];
memset(csig, 0, sizeof(*csig));
@@ -174,11 +175,16 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
csig->pf = 1 << ((val[1] >> 18) & 7);
}
+ /* serialize access to the physical write to MSR 0x79 */
+ spin_lock_irqsave(&microcode_update_lock, flags);
+
wrmsr(MSR_IA32_UCODE_REV, 0, 0);
/* see notes above for revision 1.07. Apparent chip bug */
sync_core();
/* get the current revision from MSR 0x8B */
rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev);
+ spin_unlock_irqrestore(&microcode_update_lock, flags);
+
pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
csig->sig, csig->pf, csig->rev);