diff options
| author | Wang Dongsheng <dongsheng.wang@freescale.com> | 2013-09-17 02:21:50 (GMT) |
|---|---|---|
| committer | Rivera Jose-B46482 <German.Rivera@freescale.com> | 2013-09-18 14:07:08 (GMT) |
| commit | 1f6bb110424334e2cf726ca703c0f9441b402922 (patch) | |
| tree | b641e28b47b38c5528f6887a99be12c6959a1f34 /arch | |
| parent | 4b2b581bf100ab45e2c116fd08a9b94840ce3ebf (diff) | |
| download | linux-fsl-qoriq-1f6bb110424334e2cf726ca703c0f9441b402922.tar.xz | |
fsl/powerpc: fix cpu_setup_fsl_booke.S build error
when we use corenet32_smp_defconfig. Occur, the following error:
cpu_setup_fsl_booke.S:83: undefined reference to `.has_pw20_altivec_idle'
cpu_setup_fsl_booke.S:108: undefined reference to `.has_pw20_altivec_idle'
The root cause is "bl .has_pw20_altivec_idle", the "." is only for 64bit,
should be "bl has_pw20_altivec_idle".
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Change-Id: I13b654b400313a351e50b4105eabb9affa013c34
Reviewed-on: http://git.am.freescale.net:8181/4779
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhao Chenhui-B35336 <chenhui.zhao@freescale.com>
Reviewed-by: Rivera Jose-B46482 <German.Rivera@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/kernel/cpu_setup_fsl_booke.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S index c39bbfb..f5ee308 100644 --- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S +++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S @@ -80,7 +80,7 @@ _GLOBAL(has_pw20_altivec_idle) #define PW20_WAIT_IDLE_BIT 50 /* 1ms, TB frequency is 41.66MHZ */ _GLOBAL(setup_pw20_idle) mflr r10 - bl .has_pw20_altivec_idle + bl has_pw20_altivec_idle mtlr r10 cmpwi r3, 0 beq 2f @@ -105,7 +105,7 @@ _GLOBAL(setup_pw20_idle) #define AV_WAIT_IDLE_BIT 50 /* 1ms, TB frequency is 41.66MHZ */ _GLOBAL(setup_altivec_idle) mflr r10 - bl .has_pw20_altivec_idle + bl has_pw20_altivec_idle mtlr r10 cmpwi r3, 0 beq 2f |