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author | Gabor Juhos <juhosg@openwrt.org> | 2011-06-05 21:38:44 (GMT) |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2011-12-07 22:02:44 (GMT) |
commit | 2f8501b9b81b23e99206e31b3eff65e68b56b24b (patch) | |
tree | ef4d2a0f3d9ab3973c985d465f40f74463890cbc /arch | |
parent | 5611cc4572e889b62a7b4c72a413536bf6a9c416 (diff) | |
download | linux-fsl-qoriq-2f8501b9b81b23e99206e31b3eff65e68b56b24b.tar.xz |
MIPS: ath79: Change number of available IRQs
The status register of the miscellaneous interrupt controller is 32 bits
wide, but the actual value of NR_IRQS covers only 8 of them. Change
NR_IRQS in order to make all of those interrupt lines usable.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2441/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/include/asm/mach-ath79/irq.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/include/asm/mach-ath79/irq.h b/arch/mips/include/asm/mach-ath79/irq.h index 189bc6e..cffbeab 100644 --- a/arch/mips/include/asm/mach-ath79/irq.h +++ b/arch/mips/include/asm/mach-ath79/irq.h @@ -10,10 +10,10 @@ #define __ASM_MACH_ATH79_IRQ_H #define MIPS_CPU_IRQ_BASE 0 -#define NR_IRQS 16 +#define NR_IRQS 40 #define ATH79_MISC_IRQ_BASE 8 -#define ATH79_MISC_IRQ_COUNT 8 +#define ATH79_MISC_IRQ_COUNT 32 #define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2) #define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3) |