diff options
author | Lars-Peter Clausen <lars@metafoo.de> | 2013-03-11 15:22:29 (GMT) |
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committer | Mike Turquette <mturquette@linaro.org> | 2013-03-20 00:20:30 (GMT) |
commit | 0e646c52cf0ee186ec50b41c4db8cf81500c8dd1 (patch) | |
tree | af5089cddec769ba2cfcd8f846dfc156bc39481a /drivers/clk/Kconfig | |
parent | 2850985f7749abca7fc374a438bc0126ca28c9c4 (diff) | |
download | linux-fsl-qoriq-0e646c52cf0ee186ec50b41c4db8cf81500c8dd1.tar.xz |
clk: Add axi-clkgen driver
This driver adds support for the AXI clkgen pcore to the common clock framework.
The AXI clkgen pcore is a AXI front-end to the MMCM_ADV frequency synthesizer
commonly found in Xilinx FPGAs.
The AXI clkgen pcore is used in Analog Devices' reference designs targeting
Xilinx FPGAs.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/Kconfig')
-rw-r--r-- | drivers/clk/Kconfig | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index a47e6ee..a64caef 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -63,6 +63,14 @@ config CLK_TWL6040 McPDM. McPDM module is using the external bit clock on the McPDM bus as functional clock. +config COMMON_CLK_AXI_CLKGEN + tristate "AXI clkgen driver" + depends on ARCH_ZYNQ || MICROBLAZE + help + ---help--- + Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx + FPGAs. It is commonly used in Analog Devices' reference designs. + endmenu source "drivers/clk/mvebu/Kconfig" |