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| author | Jingchang Lu <jingchang.lu@freescale.com> | 2014-08-29 08:57:20 (GMT) |
|---|---|---|
| committer | Matthew Weigel <Matthew.Weigel@freescale.com> | 2014-12-11 18:35:48 (GMT) |
| commit | 36cf34973f840c0868fd24d5b29f8eca1f9c6c54 (patch) | |
| tree | e1c9a43314f360681ef5852b795fa5047a04aefa /drivers/clk/Kconfig | |
| parent | ac69145e065cc0ae66a172a3763feab4b660114a (diff) | |
| download | linux-fsl-qoriq-36cf34973f840c0868fd24d5b29f8eca1f9c6c54.tar.xz | |
clk: ppc-corenet: rename to ppc-qoriq for better represention
The IP is shared on PPC and ARM, rename it to qoriq for better
represention.
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Change-Id: Ib02baa7731d9d1d9955ffde9860deb517d8d7ca8
Reviewed-on: http://git.am.freescale.net:8181/17836
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Diffstat (limited to 'drivers/clk/Kconfig')
| -rw-r--r-- | drivers/clk/Kconfig | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 60c0a01..0e29396 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -86,12 +86,12 @@ config COMMON_CLK_AXI_CLKGEN Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx FPGAs. It is commonly used in Analog Devices' reference designs. -config CLK_PPC_CORENET - bool "Clock driver for PowerPC corenet platforms" - depends on (PPC_E500MC || FSL_SOC) && OF +config CLK_QORIQ + bool "Clock driver for PowerPC corenet and ARM-based platforms" + depends on (PPC_E500MC || ARM) && OF ---help--- This adds the clock driver support for Freescale PowerPC corenet - platforms using common clock framework. + and Freescale ARM based platforms using common clock framework. endmenu |