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authorTang Yuantian <yuantian.tang@freescale.com>2013-04-09 08:46:26 (GMT)
committerMike Turquette <mturquette@linaro.org>2013-05-29 05:50:31 (GMT)
commit555eae97358082be3a46572464829c27b96ed8f1 (patch)
tree497a460b83e4a0cdfdca2bb7dded96a4ec1a6b5d /drivers/clk/Kconfig
parente4aa937ec75df0eea0bee03bffa3303ad36c986b (diff)
downloadlinux-fsl-qoriq-555eae97358082be3a46572464829c27b96ed8f1.tar.xz
clk: add PowerPC corenet clock driver support
This adds the clock driver for Freescale PowerPC corenet series SoCs using common clock infrastructure. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/Kconfig')
-rw-r--r--drivers/clk/Kconfig7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 0357ac4..30fc2b4 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -81,6 +81,13 @@ config COMMON_CLK_AXI_CLKGEN
Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
FPGAs. It is commonly used in Analog Devices' reference designs.
+config CLK_PPC_CORENET
+ bool "Clock driver for PowerPC corenet platforms"
+ depends on PPC_E500MC && OF
+ ---help---
+ This adds the clock driver support for Freescale PowerPC corenet
+ platforms using common clock framework.
+
endmenu
source "drivers/clk/mvebu/Kconfig"