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author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-02-14 23:20:50 (GMT) |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-02-14 23:20:50 (GMT) |
commit | 8b36ac50da8e12d0469a7268ddbd6cab29307deb (patch) | |
tree | 4a48e1ea476dc4753f139eac01be0c4c576810fc /drivers/mmc/host/sdhci-of-esdhc.c | |
parent | 694ce18ec3485f5b0a4f3820073f5e2b0b4e0870 (diff) | |
parent | f9c2a0dc42a6938ff2a80e55ca2bbd1d5581c72e (diff) | |
download | linux-fsl-qoriq-8b36ac50da8e12d0469a7268ddbd6cab29307deb.tar.xz |
Merge tag 'mmc-fixes-for-3.3-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc
MMC fixes for 3.3-rc4:
* The most visible fix here is against a regression introduced in 3.3-rc1
that ran cards in Ultra High Speed mode even when they failed to initialize
in that mode, leading to lower-speed cards failing to mount.
* A lockdep warning introduced in 3.3-rc1 is fixed.
* Various other small driver fixes, most notably for a NULL dereference
when using highmem with dw_mmc.
* tag 'mmc-fixes-for-3.3-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc:
mmc: dw_mmc: Fix PIO mode with support of highmem
mmc: atmel-mci: save and restore sdioirq when soft reset is performed
mmc: block: Init ro_lock sysfs attr to fix lockdep warnings
mmc: sh_mmcif: fix late delayed work initialisation
mmc: tmio_mmc: fix card eject during IO with DMA
mmc: core: Fix comparison issue in mmc_compare_ext_csds
mmc: core: Fix PowerOff Notify suspend/resume
mmc: sdhci-pci: set Medfield SDIO as non-removable
mmc: core: add the capability for broken voltage
mmc: core: Fix low speed mmc card detection failure
mmc: esdhc: set the timeout to the max value
mmc: esdhc: add PIO mode support
mmc: core: Ensure clocks are always enabled before host interaction
mmc: of_mmc_spi: fix little endian support
mmc: core: UHS sdio card that fails should not exceed 50MHz
mmc: esdhc: fix errors when booting kernel on Freescale eSDHC version 2.3
Diffstat (limited to 'drivers/mmc/host/sdhci-of-esdhc.c')
-rw-r--r-- | drivers/mmc/host/sdhci-of-esdhc.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c index ff4adc0..5d876ff 100644 --- a/drivers/mmc/host/sdhci-of-esdhc.c +++ b/drivers/mmc/host/sdhci-of-esdhc.c @@ -38,6 +38,23 @@ static u8 esdhc_readb(struct sdhci_host *host, int reg) int base = reg & ~0x3; int shift = (reg & 0x3) * 8; u8 ret = (in_be32(host->ioaddr + base) >> shift) & 0xff; + + /* + * "DMA select" locates at offset 0x28 in SD specification, but on + * P5020 or P3041, it locates at 0x29. + */ + if (reg == SDHCI_HOST_CONTROL) { + u32 dma_bits; + + dma_bits = in_be32(host->ioaddr + reg); + /* DMA select is 22,23 bits in Protocol Control Register */ + dma_bits = (dma_bits >> 5) & SDHCI_CTRL_DMA_MASK; + + /* fixup the result */ + ret &= ~SDHCI_CTRL_DMA_MASK; + ret |= dma_bits; + } + return ret; } @@ -56,6 +73,21 @@ static void esdhc_writew(struct sdhci_host *host, u16 val, int reg) static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg) { + /* + * "DMA select" location is offset 0x28 in SD specification, but on + * P5020 or P3041, it's located at 0x29. + */ + if (reg == SDHCI_HOST_CONTROL) { + u32 dma_bits; + + /* DMA select is 22,23 bits in Protocol Control Register */ + dma_bits = (val & SDHCI_CTRL_DMA_MASK) << 5; + clrsetbits_be32(host->ioaddr + reg , SDHCI_CTRL_DMA_MASK << 5, + dma_bits); + val &= ~SDHCI_CTRL_DMA_MASK; + val |= in_be32(host->ioaddr + reg) & SDHCI_CTRL_DMA_MASK; + } + /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */ if (reg == SDHCI_HOST_CONTROL) val &= ~ESDHC_HOST_CONTROL_RES; |