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author | Larry Finger <Larry.Finger@lwfinger.net> | 2010-08-20 15:15:30 (GMT) |
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committer | Larry Finger <Larry.Finger@lwfinger.net> | 2010-08-20 15:15:30 (GMT) |
commit | 2865d42c78a9121caad52cb02d1fbb7f5cdbc4ef (patch) | |
tree | 430b79f753b0e1cec6379b9a4208a716c914ac65 /drivers/staging/rtl8712/rtl8712_cmdctrl_bitdef.h | |
parent | 763008c4357b73c8d18396dfd8d79dc58fa3f99d (diff) | |
download | linux-fsl-qoriq-2865d42c78a9121caad52cb02d1fbb7f5cdbc4ef.tar.xz |
staging: r8712u: Add the new driver to the mainline kernel
This code is for a completely new version of the Realtek 8192 USB devices
such as the D-Link DWA-130. The Realtek code, which was originally for
Linux, Windows XP and Windows CE, has been stripped of all code not needed
for Linux. In addition, only one additional configuration variable, which
enables AP mode, remains.
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: Florian Schilhabel <florian.c.schilhabel@googlemail.com>
Tested-by: Frederic Leroy <fredo@starox.org>
Diffstat (limited to 'drivers/staging/rtl8712/rtl8712_cmdctrl_bitdef.h')
-rw-r--r-- | drivers/staging/rtl8712/rtl8712_cmdctrl_bitdef.h | 89 |
1 files changed, 89 insertions, 0 deletions
diff --git a/drivers/staging/rtl8712/rtl8712_cmdctrl_bitdef.h b/drivers/staging/rtl8712/rtl8712_cmdctrl_bitdef.h new file mode 100644 index 0000000..6c49903 --- /dev/null +++ b/drivers/staging/rtl8712/rtl8712_cmdctrl_bitdef.h @@ -0,0 +1,89 @@ +#ifndef __RTL8712_CMDCTRL_BITDEF_H__ +#define __RTL8712_CMDCTRL_BITDEF_H__ + +/* + * 2. Command Control Registers (Offset: 0x0040 - 0x004F)*/ +/*--------------------------------------------------------------------------*/ +/* 8192S (CMD) command register bits (Offset 0x40, 16 bits)*/ +/*--------------------------------------------------------------------------*/ +#define _APSDOFF_STATUS BIT(15) +#define _APSDOFF BIT(14) +#define _BBRSTn BIT(13) /*Enable OFDM/CCK*/ +#define _BB_GLB_RSTn BIT(12) /*Enable BB*/ +#define _SCHEDULE_EN BIT(10) /*Enable MAC scheduler*/ +#define _MACRXEN BIT(9) +#define _MACTXEN BIT(8) +#define _DDMA_EN BIT(7) /*FW off load function enable*/ +#define _FW2HW_EN BIT(6) /*MAC every module reset */ +#define _RXDMA_EN BIT(5) +#define _TXDMA_EN BIT(4) +#define _HCI_RXDMA_EN BIT(3) +#define _HCI_TXDMA_EN BIT(2) + +/*TXPAUSE*/ +#define _STOPHCCA BIT(6) +#define _STOPHIGH BIT(5) +#define _STOPMGT BIT(4) +#define _STOPVO BIT(3) +#define _STOPVI BIT(2) +#define _STOPBE BIT(1) +#define _STOPBK BIT(0) + +/*TCR*/ +#define _DISCW BIT(20) +#define _ICV BIT(19) +#define _CFEND_FMT BIT(17) +#define _CRC BIT(16) +#define _FWRDY BIT(7) +#define _BASECHG BIT(6) +#define _IMEM_RDY BIT(5) +#define _DMEM_CODE_DONE BIT(4) +#define _EMEM_CHK_RPT BIT(3) +#define _EMEM_CODE_DONE BIT(2) +#define _IMEM_CHK_RPT BIT(1) +#define _IMEM_CODE_DONE BIT(0) + +#define _TXDMA_INIT_VALUE (_IMEM_CHK_RPT|_EMEM_CHK_RPT) + +/*RCR*/ +#define _ENMBID BIT(27) +#define _APP_PHYST_RXFF BIT(25) +#define _APP_PHYST_STAFF BIT(24) +#define _CBSSID BIT(23) +#define _APWRMGT BIT(22) +#define _ADD3 BIT(21) +#define _AMF BIT(20) +#define _ACF BIT(19) +#define _ADF BIT(18) +#define _APP_MIC BIT(17) +#define _APP_ICV BIT(16) +#define _RXFTH_MSK 0x0000E000 +#define _RXFTH_SHT 13 +#define _AICV BIT(12) +#define _RXPKTLMT_MSK 0x00000FC0 +#define _RXPKTLMT_SHT 6 +#define _ACRC32 BIT(5) +#define _AB BIT(3) +#define _AM BIT(2) +#define _APM BIT(1) +#define _AAP BIT(0) + +/*MSR*/ +#define _NETTYPE_MSK 0x03 +#define _NETTYPE_SHT 0 + +/*BT*/ +#define _BTMODE_MSK 0x06 +#define _BTMODE_SHT 1 +#define _ENBT BIT(0) + +/*MBIDCTRL*/ +#define _ENMBID_MODE BIT(15) +#define _BCNNO_MSK 0x7000 +#define _BCNNO_SHT 12 +#define _BCNSPACE_MSK 0x0FFF +#define _BCNSPACE_SHT 0 + + +#endif /* __RTL8712_CMDCTRL_BITDEF_H__*/ + |