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-rwxr-xr-xdrivers/net/ethernet/freescale/fman/inc/flib/fsl_fman.h117
-rw-r--r--drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_dtsec.h269
-rw-r--r--drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_memac.h119
-rwxr-xr-xdrivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_rtc.h429
-rwxr-xr-xdrivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_sp.h138
-rw-r--r--drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_tgec.h115
6 files changed, 940 insertions, 247 deletions
diff --git a/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman.h b/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman.h
new file mode 100755
index 0000000..795f6b2
--- /dev/null
+++ b/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman.h
@@ -0,0 +1,117 @@
+/*
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __FSL_FMAN_H
+#define __FSL_FMAN_H
+
+#include "common/general.h"
+
+
+struct fman_ext_pool_params {
+ uint8_t id; /**< External buffer pool id */
+ uint16_t size; /**< External buffer pool buffer size */
+};
+
+struct fman_ext_pools {
+ uint8_t num_pools_used; /**< Number of pools use by this port */
+ struct fman_ext_pool_params *ext_buf_pool;
+ /**< Parameters for each port */
+};
+
+struct fman_backup_bm_pools {
+ uint8_t num_backup_pools; /**< Number of BM backup pools -
+ must be smaller than the total number
+ of pools defined for the specified
+ port.*/
+ uint8_t *pool_ids; /**< numOfBackupPools pool id's,
+ specifying which pools should be used
+ only as backup. Pool id's specified
+ here must be a subset of the pools
+ used by the specified port.*/
+};
+
+/**************************************************************************//**
+ @Description A structure for defining BM pool depletion criteria
+*//***************************************************************************/
+struct fman_buf_pool_depletion {
+ bool buf_pool_depletion_enabled;
+ bool pools_grp_mode_enable; /**< select mode in which pause frames
+ will be sent after a number of pools
+ (all together!) are depleted */
+ uint8_t num_pools; /**< the number of depleted pools that
+ will invoke pause frames transmission.
+ */
+ bool *pools_to_consider; /**< For each pool, TRUE if it should be
+ considered for depletion (Note - this
+ pool must be used by this port!). */
+ bool single_pool_mode_enable; /**< select mode in which pause frames
+ will be sent after a single-pool
+ is depleted; */
+ bool *pools_to_consider_for_single_mode;
+ /**< For each pool, TRUE if it should be
+ considered for depletion (Note - this
+ pool must be used by this port!) */
+ bool has_pfc_priorities;
+ bool *pfc_priorities_en; /**< This field is used by the MAC as
+ the Priority Enable Vector in the PFC
+ frame which is transmitted */
+};
+
+/**************************************************************************//**
+ @Description Enum for defining port DMA swap mode
+*//***************************************************************************/
+enum fman_dma_swap_option {
+ FMAN_DMA_NO_SWP, /**< No swap, transfer data as is.*/
+ FMAN_DMA_SWP_PPC_LE, /**< The transferred data should be swapped
+ in PowerPc Little Endian mode. */
+ FMAN_DMA_SWP_BE /**< The transferred data should be swapped
+ in Big Endian mode */
+};
+
+/**************************************************************************//**
+ @Description Enum for defining port DMA cache attributes
+*//***************************************************************************/
+enum fman_dma_cache_option {
+ FMAN_DMA_NO_STASH = 0, /**< Cacheable, no Allocate (No Stashing) */
+ FMAN_DMA_STASH = 1 /**< Cacheable and Allocate (Stashing on) */
+};
+
+/* sizes */
+#define CAPWAP_FRAG_EXTRA_SPACE 32
+#define OFFSET_UNITS 16
+#define MAX_INT_OFFSET 240
+#define MAX_IC_SIZE 256
+#define MAX_EXT_OFFSET 496
+#define MAX_EXT_BUFFER_OFFSET 511
+
+
+#endif /* __FSL_FMAN_H */
diff --git a/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_dtsec.h b/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_dtsec.h
index 55527c1..445e73c8 100644
--- a/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_dtsec.h
+++ b/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_dtsec.h
@@ -41,19 +41,19 @@
*
* To prepare dTSEC block for transfer use the following call sequence:
*
- * - dtsec_defconfig() - This step is optional and yet recommended. Its use is
+ * - fman_dtsec_defconfig() - This step is optional and yet recommended. Its use is
* to obtain the default dTSEC configuration parameters.
*
* - Change dtsec configuration in &dtsec_cfg. This structure will be used
* to customize the dTSEC behavior.
*
- * - dtsec_init() - Applies the configuration on dTSEC hardware. Note that
+ * - fman_dtsec_init() - Applies the configuration on dTSEC hardware. Note that
* dTSEC is initialized while both Tx and Rx are disabled.
*
- * - dtsec_set_mac_address() - Set the station address (mac address).
+ * - fman_dtsec_set_mac_address() - Set the station address (mac address).
* This is used by dTSEC to match against received packets.
*
- * - dtsec_adjust_link() - Set the link speed and duplex parameters
+ * - fman_dtsec_adjust_link() - Set the link speed and duplex parameters
* after the PHY establishes the link.
*
* - dtsec_enable_tx() and dtsec_enable_rx() to enable transmission and
@@ -63,15 +63,15 @@
/**
* DOC: dTSEC Graceful stop
*
- * To temporary stop dTSEC activity use dtsec_stop_tx() and dtsec_stop_rx().
+ * To temporary stop dTSEC activity use fman_dtsec_stop_tx() and fman_dtsec_stop_rx().
* Note that these functions request dTSEC graceful stop but return before this
* stop is complete. To query for graceful stop completion use
- * dtsec_get_event() and check DTSEC_IEVENT_GTSC and DTSEC_IEVENT_GRSC bits.
+ * fman_dtsec_get_event() and check DTSEC_IEVENT_GTSC and DTSEC_IEVENT_GRSC bits.
* Alternatively the dTSEC interrupt mask can be set to enable graceful stop
* interrupts.
*
- * To resume operation after graceful stop use dtsec_start_tx() and
- * dtsec_start_rx().
+ * To resume operation after graceful stop use fman_dtsec_start_tx() and
+ * fman_dtsec_start_rx().
*/
/**
@@ -93,10 +93,10 @@
* occurs and its corresponding enable bit is set in the interrupt mask
* register, the event also causes a hardware interrupt at the PIC.
*
- * To poll for event status use the dtsec_get_event() function.
- * To configure the interrupt mask use dtsec_enable_interrupt() and
- * dtsec_disable_interrupt() functions.
- * After servicing a dTSEC interrupt use dtsec_ack_event to reset the serviced
+ * To poll for event status use the fman_dtsec_get_event() function.
+ * To configure the interrupt mask use fman_dtsec_enable_interrupt() and
+ * fman_dtsec_disable_interrupt() functions.
+ * After servicing a dTSEC interrupt use fman_dtsec_ack_event to reset the serviced
* event bit.
*
* The following events may be signaled by dTSEC hardware:
@@ -107,7 +107,7 @@
*
* %DTSEC_IEVENT_RXC - Receive control (pause frame) interrupt. A pause
* control frame was received while Rx pause frame handling is enabled.
- * Also see dtsec_handle_rx_pause().
+ * Also see fman_dtsec_handle_rx_pause().
*
* %DTSEC_IEVENT_MSRO - MIB counter overflow. The count for one of the MIB
* counters has exceeded the size of its register.
@@ -115,7 +115,7 @@
* %DTSEC_IEVENT_GTSC - Graceful transmit stop complete. Graceful stop is now
* complete. The transmitter is in a stopped state, in which only pause frames
* can be transmitted.
- * Also see dtsec_stop_tx().
+ * Also see fman_dtsec_stop_tx().
*
* %DTSEC_IEVENT_BABT - Babbling transmit error. The transmitted frame length
* has exceeded the value in the MAC's Maximum Frame Length register.
@@ -139,7 +139,7 @@
* being transmitted and transmission of the next frame commences. This only
* occurs while in half-duplex mode.
* The number of retransmit attempts can be set in
- * &dtsec_halfdup_cfg.@retransmit before calling dtsec_init().
+ * &dtsec_halfdup_cfg.@retransmit before calling fman_dtsec_init().
*
* %DTSEC_IEVENT_XFUN - Transmit FIFO underrun. This bit indicates that the
* transmit FIFO became empty before the complete frame was transmitted.
@@ -654,7 +654,7 @@ enum dtsec_stat_counters {
* Ethernet frames and passed up to the packet interface on
* a DA match. Received pause control frames are passed to
* the packet interface only if Rx flow control is also
- * disabled. See dtsec_handle_rx_pause() function.
+ * disabled. See fman_dtsec_handle_rx_pause() function.
* @tx_pause_time: Transmit pause time value. This pause value is used as
* part of the pause frame to be sent when a transmit pause
* frame is initiated. If set to 0 this disables
@@ -679,8 +679,8 @@ enum dtsec_stat_counters {
* precedes the layer 2 header.
*
* This structure contains basic dTSEC configuration and must be passed to
- * dtsec_init() function. A default set of configuration values can be obtained
- * by calling dtsec_defconfig().
+ * fman_dtsec_init() function. A default set of configuration values can be obtained
+ * by calling fman_dtsec_defconfig().
*/
struct dtsec_cfg {
bool halfdup_on;
@@ -723,17 +723,17 @@ struct dtsec_cfg {
/**
- * dtsec_defconfig() - Get default dTSEC configuration
+ * fman_dtsec_defconfig() - Get default dTSEC configuration
* @cfg: pointer to configuration structure.
*
* Call this function to obtain a default set of configuration values for
* initializing dTSEC. The user can overwrite any of the values before calling
- * dtsec_init(), if specific configuration needs to be applied.
+ * fman_dtsec_init(), if specific configuration needs to be applied.
*/
-void dtsec_defconfig(struct dtsec_cfg *cfg);
+void fman_dtsec_defconfig(struct dtsec_cfg *cfg);
/**
- * dtsec_init() - Init dTSEC hardware block
+ * fman_dtsec_init() - Init dTSEC hardware block
* @regs: Pointer to dTSEC register block
* @cfg: dTSEC configuration data
* @iface_mode: dTSEC interface mode, the type of MAC - PHY interface.
@@ -747,60 +747,98 @@ void dtsec_defconfig(struct dtsec_cfg *cfg);
*
* dTSEC initialization sequence:
* Before enabling Rx/Tx call dtsec_set_address() to set MAC address,
- * dtsec_adjust_link() to configure interface speed and duplex and finally
+ * fman_dtsec_adjust_link() to configure interface speed and duplex and finally
* dtsec_enable_tx()/dtsec_enable_rx() to start transmission and reception.
*
* Returns: 0 if successful, an error code otherwise.
*/
-int dtsec_init(struct dtsec_regs *regs, struct dtsec_cfg *cfg,
- enum enet_interface iface_mode,
- enum enet_speed iface_speed,
- uint8_t *macaddr, uint8_t fm_rev_maj,
- uint8_t fm_rev_min,
- uint32_t exception_mask);
+int fman_dtsec_init(struct dtsec_regs *regs, struct dtsec_cfg *cfg,
+ enum enet_interface iface_mode,
+ enum enet_speed iface_speed,
+ uint8_t *macaddr, uint8_t fm_rev_maj,
+ uint8_t fm_rev_min,
+ uint32_t exception_mask);
/**
- * dtsec_get_revision() - Get dTSEC hardware revision
+ * fman_dtsec_enable() - Enable dTSEC Tx and Tx
+ * @regs: Pointer to dTSEC register block
+ * @apply_rx: enable rx side
+ * @apply_tx: enable tx side
+ *
+ * This function resets Tx and Rx graceful stop bit and enables dTSEC Tx and Rx.
+ */
+void fman_dtsec_enable(struct dtsec_regs *regs, bool apply_rx, bool apply_tx);
+
+/**
+ * fman_dtsec_disable() - Disable dTSEC Tx and Rx
+ * @regs: Pointer to dTSEC register block
+ * @apply_rx: disable rx side
+ * @apply_tx: disable tx side
+ *
+ * This function disables Tx and Rx in dTSEC.
+ */
+void fman_dtsec_disable(struct dtsec_regs *regs, bool apply_rx, bool apply_tx);
+
+/**
+ * fman_dtsec_get_revision() - Get dTSEC hardware revision
* @regs: Pointer to dTSEC register block
*
* Returns dtsec_id content
*
* Call this function to obtain the dTSEC hardware version.
*/
-uint32_t dtsec_get_revision(struct dtsec_regs *regs);
+uint32_t fman_dtsec_get_revision(struct dtsec_regs *regs);
/**
- * dtsec_set_uc_promisc() - Sets unicast promiscuous mode
+ * fman_dtsec_set_mac_address() - Set MAC station address
+ * @regs: Pointer to dTSEC register block
+ * @macaddr: MAC address array
+ *
+ * This function sets MAC station address. To enable unicast reception call
+ * this after fman_dtsec_init(). While promiscuous mode is disabled dTSEC will match
+ * the destination address of received unicast frames against this address.
+ */
+void fman_dtsec_set_mac_address(struct dtsec_regs *regs, uint8_t *macaddr);
+
+/**
+ * fman_dtsec_get_mac_address() - Query MAC station address
+ * @regs: Pointer to dTSEC register block
+ * @macaddr: MAC address array
+ */
+void fman_dtsec_get_mac_address(struct dtsec_regs *regs, uint8_t *macaddr);
+
+/**
+ * fman_dtsec_set_uc_promisc() - Sets unicast promiscuous mode
* @regs: Pointer to dTSEC register block
* @enable: Enable unicast promiscuous mode
*
* Use this function to enable/disable dTSEC L2 address filtering. If the
* address filtering is disabled all unicast packets are accepted.
- * To set dTSEC in promiscuous mode call both dtsec_set_uc_promisc() and
- * dtsec_set_mc_promisc() to disable filtering for both unicast and multicast
+ * To set dTSEC in promiscuous mode call both fman_dtsec_set_uc_promisc() and
+ * fman_dtsec_set_mc_promisc() to disable filtering for both unicast and multicast
* addresses.
*/
-void dtsec_set_uc_promisc(struct dtsec_regs *regs, bool enable);
+void fman_dtsec_set_uc_promisc(struct dtsec_regs *regs, bool enable);
/**
- * dtsec_adjust_link() - Adjust dTSEC speed/duplex settings
+ * fman_dtsec_adjust_link() - Adjust dTSEC speed/duplex settings
* @regs: Pointer to dTSEC register block
* @iface_mode: dTSEC interface mode
* @speed: Link speed
* @full_dx: True for full-duplex, false for half-duplex.
*
* This function configures the MAC to function and the desired rates. Use it
- * to configure dTSEC after dtsec_init() and whenever the link speed changes
+ * to configure dTSEC after fman_dtsec_init() and whenever the link speed changes
* (for instance following PHY auto-negociation).
*
* Returns: 0 if successful, an error code otherwise.
*/
-int dtsec_adjust_link(struct dtsec_regs *regs,
- enum enet_interface iface_mode,
- enum enet_speed speed, bool full_dx);
+int fman_dtsec_adjust_link(struct dtsec_regs *regs,
+ enum enet_interface iface_mode,
+ enum enet_speed speed, bool full_dx);
/**
- * dtsec_set_tbi_phy_addr() - Updates TBI address field
+ * fman_dtsec_set_tbi_phy_addr() - Updates TBI address field
* @regs: Pointer to dTSEC register block
* @address: Valid PHY address in the range of 1 to 31. 0 is reserved.
*
@@ -809,70 +847,29 @@ int dtsec_adjust_link(struct dtsec_regs *regs,
*
* Returns: 0 if successful, an error code otherwise.
*/
-int dtsec_set_tbi_phy_addr(struct dtsec_regs *regs,
- uint8_t addr);
+int fman_dtsec_set_tbi_phy_addr(struct dtsec_regs *regs,
+ uint8_t addr);
/**
- * dtsec_disable() - Disable dTSEC Tx and Rx
- * @regs: Pointer to dTSEC register block
- * @apply_rx: disable rx side
- * @apply_tx: disable tx side
- *
- * This function disables Tx and Rx in dTSEC.
- */
-void dtsec_disable(struct dtsec_regs *regs, bool apply_rx, bool apply_tx);
-
-/**
- * dtsec_enable() - Enable dTSEC Tx and Tx
- * @regs: Pointer to dTSEC register block
- * @apply_rx: enable rx side
- * @apply_tx: enable tx side
- *
- * This function resets Tx and Rx graceful stop bit and enables dTSEC Tx and Rx.
- */
-void dtsec_enable(struct dtsec_regs *regs, bool apply_rx, bool apply_tx);
-
-/**
- * dtsec_set_mac_address() - Set MAC station address
- * @regs: Pointer to dTSEC register block
- * @macaddr: MAC address array
- *
- * This function sets MAC station address. To enable unicast reception call
- * this after dtsec_init(). While promiscuous mode is disabled dTSEC will match
- * the destination address of received unicast frames against this address.
- */
-void dtsec_set_mac_address(struct dtsec_regs *regs, uint8_t *macaddr);
-
-/**
- * dtsec_get_mac_address() - Query MAC station address
- * @regs: Pointer to dTSEC register block
- * @macaddr: MAC address array
- */
-void dtsec_get_mac_address(struct dtsec_regs *regs, uint8_t *macaddr);
-
-/**
- * dtsec_set_max_frame_len() - Set max frame length
+ * fman_dtsec_set_max_frame_len() - Set max frame length
* @regs: Pointer to dTSEC register block
* @length: Max frame length.
*
* Sets maximum frame length for received and transmitted frames. Frames that
* exceeds this length are truncated.
*/
-
-void dtsec_set_max_frame_len(struct dtsec_regs *regs, uint16_t length);
-
+void fman_dtsec_set_max_frame_len(struct dtsec_regs *regs, uint16_t length);
/**
- * dtsec_get_max_frame_len() - Query max frame length
+ * fman_dtsec_get_max_frame_len() - Query max frame length
* @regs: Pointer to dTSEC register block
*
* Returns: the current value of the maximum frame length.
*/
-uint16_t dtsec_get_max_frame_len(struct dtsec_regs *regs);
-
+uint16_t fman_dtsec_get_max_frame_len(struct dtsec_regs *regs);
/**
- * dtsec_handle_rx_pause() - Configure pause frame handling
+ * fman_dtsec_handle_rx_pause() - Configure pause frame handling
* @regs: Pointer to dTSEC register block
* @en: Enable pause frame handling in dTSEC
*
@@ -882,20 +879,20 @@ uint16_t dtsec_get_max_frame_len(struct dtsec_regs *regs);
* frames will be transferred to the packet interface just like regular Ethernet
* frames.
*/
-void dtsec_handle_rx_pause(struct dtsec_regs *regs, bool en);
+void fman_dtsec_handle_rx_pause(struct dtsec_regs *regs, bool en);
/**
- * dtsec_set_tx_pause_time() - Configure Tx pause time
+ * fman_dtsec_set_tx_pause_frames() - Configure Tx pause time
* @regs: Pointer to dTSEC register block
* @time: Time value included in pause frames
*
* Call this function to set the time value used in transmitted pause frames.
* If time is 0, transmission of pause frames is disabled
*/
-void dtsec_set_tx_pause_time(struct dtsec_regs *regs, uint16_t time);
+void fman_dtsec_set_tx_pause_frames(struct dtsec_regs *regs, uint16_t time);
/**
- * dtsec_ack_event() - Acknowledge handled events
+ * fman_dtsec_ack_event() - Acknowledge handled events
* @regs: Pointer to dTSEC register block
* @ev_mask: Events to acknowledge
*
@@ -903,10 +900,10 @@ void dtsec_set_tx_pause_time(struct dtsec_regs *regs, uint16_t time);
* call this function to reset the associated status bits in dTSEC event
* register.
*/
-void dtsec_ack_event(struct dtsec_regs *regs, uint32_t ev_mask);
+void fman_dtsec_ack_event(struct dtsec_regs *regs, uint32_t ev_mask);
/**
- * dtsec_get_event() - Returns currently asserted events
+ * fman_dtsec_get_event() - Returns currently asserted events
* @regs: Pointer to dTSEC register block
* @ev_mask: Mask of relevant events
*
@@ -915,9 +912,10 @@ void dtsec_ack_event(struct dtsec_regs *regs, uint32_t ev_mask);
*
* Returns: a bit-mask of events asserted in dTSEC.
*/
-uint32_t dtsec_get_event(struct dtsec_regs *regs, uint32_t ev_mask);
+uint32_t fman_dtsec_get_event(struct dtsec_regs *regs, uint32_t ev_mask);
+
/**
- * dtsec_get_interrupt_mask() - Returns a bit-mask of enabled interrupts
+ * fman_dtsec_get_interrupt_mask() - Returns a bit-mask of enabled interrupts
* @regs: Pointer to dTSEC register block
*
* Call this function to obtain a bit-mask of enabled interrupts
@@ -925,51 +923,51 @@ uint32_t dtsec_get_event(struct dtsec_regs *regs, uint32_t ev_mask);
*
* Returns: a bit-mask of enabled interrupts in dTSEC.
*/
-uint32_t dtsec_get_interrupt_mask(struct dtsec_regs *regs);
+uint32_t fman_dtsec_get_interrupt_mask(struct dtsec_regs *regs);
-void dtsec_clear_addr_in_paddr (struct dtsec_regs *regs,
- uint8_t paddr_num);
+void fman_dtsec_clear_addr_in_paddr(struct dtsec_regs *regs,
+ uint8_t paddr_num);
-void dtsec_add_addr_in_paddr (struct dtsec_regs *regs,
- uint64_t addr,
- uint8_t paddr_num);
+void fman_dtsec_add_addr_in_paddr(struct dtsec_regs *regs,
+ uint64_t addr,
+ uint8_t paddr_num);
-void dtsec_enable_tmr_interrupt (struct dtsec_regs *regs);
+void fman_dtsec_enable_tmr_interrupt (struct dtsec_regs *regs);
-void dtsec_disable_tmr_interrupt(struct dtsec_regs *regs);
+void fman_dtsec_disable_tmr_interrupt(struct dtsec_regs *regs);
/**
- * dtsec_disable_interrupt() - Disables interrupts for the specified events
+ * fman_dtsec_disable_interrupt() - Disables interrupts for the specified events
* @regs: Pointer to dTSEC register block
* @ev_mask: Mask of relevant events
*
* Call this function to disable interrupts in dTSEC for the specified events.
- * To enable interrupts use dtsec_enable_interrupt().
+ * To enable interrupts use fman_dtsec_enable_interrupt().
*/
-void dtsec_disable_interrupt(struct dtsec_regs *regs, uint32_t ev_mask);
+void fman_dtsec_disable_interrupt(struct dtsec_regs *regs, uint32_t ev_mask);
/**
- * dtsec_enable_interrupt() - Enable interrupts for the specified events
+ * fman_dtsec_enable_interrupt() - Enable interrupts for the specified events
* @regs: Pointer to dTSEC register block
* @ev_mask: Mask of relevant events
*
* Call this function to enable interrupts in dTSEC for the specified events.
- * To disable interrupts use dtsec_disable_interrupt().
+ * To disable interrupts use fman_dtsec_disable_interrupt().
*/
-void dtsec_enable_interrupt(struct dtsec_regs *regs, uint32_t ev_mask);
+void fman_dtsec_enable_interrupt(struct dtsec_regs *regs, uint32_t ev_mask);
/**
- * dtsec_set_ts() - Enables dTSEC timestamps
+ * fman_dtsec_set_ts() - Enables dTSEC timestamps
* @regs: Pointer to dTSEC register block
* @en: true to enable timestamps, false to disable them
*
* Call this function to enable/disable dTSEC timestamps. This affects both
* Tx and Rx.
*/
-void dtsec_set_ts(struct dtsec_regs *regs, bool en);
+void fman_dtsec_set_ts(struct dtsec_regs *regs, bool en);
/**
- * dtsec_set_bucket() - Enables/disables a filter bucket
+ * fman_dtsec_set_bucket() - Enables/disables a filter bucket
* @regs: Pointer to dTSEC register block
* @bucket: Bucket index
* @enable: true/false to enable/disable this bucket
@@ -982,36 +980,36 @@ void dtsec_set_ts(struct dtsec_regs *regs, bool en);
* is enabled requires further filtering and verification in the upper layers
*
*/
-void dtsec_set_bucket(struct dtsec_regs *regs, int bucket, bool enable);
+void fman_dtsec_set_bucket(struct dtsec_regs *regs, int bucket, bool enable);
/**
- * dtsec_reset_filter_table() - Resets the address filtering table
+ * fman_dtsec_reset_filter_table() - Resets the address filtering table
* @regs: Pointer to dTSEC register block
* @mcast: Reset multicast entries
* @ucast: Reset unicast entries
*
* Resets all entries in L2 address filter table. After calling this function
- * all buckets enabled using dtsec_set_bucket() will be disabled.
+ * all buckets enabled using fman_dtsec_set_bucket() will be disabled.
* If dtsec_init_filter_table() was called with @unicast_hash set to false,
* @ucast argument is ignored.
* This does not affect the primary nor the 15 additional addresses configured
* using dtsec_set_address() or dtsec_set_match_address().
*/
-void dtsec_reset_filter_table(struct dtsec_regs *regs, bool mcast, bool ucast);
+void fman_dtsec_reset_filter_table(struct dtsec_regs *regs, bool mcast, bool ucast);
/**
- * dtsec_set_mc_promisc() - Set multicast promiscous mode
+ * fman_dtsec_set_mc_promisc() - Set multicast promiscous mode
* @regs: Pointer to dTSEC register block
* @enable: Enable multicast promiscous mode
*
* Call this to enable/disable L2 address filtering for multicast packets.
*/
-void dtsec_set_mc_promisc(struct dtsec_regs *regs, bool enable);
+void fman_dtsec_set_mc_promisc(struct dtsec_regs *regs, bool enable);
/* statistics APIs */
/**
- * dtsec_set_stat_level() - Enable a group of MIB statistics counters
+ * fman_dtsec_set_stat_level() - Enable a group of MIB statistics counters
* @regs: Pointer to dTSEC register block
* @level: Specifies a certain group of dTSEC MIB HW counters or _all_,
* to specify all the existing counters.
@@ -1022,16 +1020,16 @@ void dtsec_set_mc_promisc(struct dtsec_regs *regs, bool enable);
*
* Returns: error if invalid @level value given.
*/
-int dtsec_set_stat_level(struct dtsec_regs *regs, enum mac_stat_level level);
+int fman_dtsec_set_stat_level(struct dtsec_regs *regs, enum mac_stat_level level);
/**
- * dtsec_reset_stat() - Completely resets all dTSEC HW counters
+ * fman_dtsec_reset_stat() - Completely resets all dTSEC HW counters
* @regs: Pointer to dTSEC register block
*/
-void dtsec_reset_stat(struct dtsec_regs *regs);
+void fman_dtsec_reset_stat(struct dtsec_regs *regs);
/**
- * dtsec_get_clear_carry_regs() - Read and clear carry bits (CAR1-2 registers)
+ * fman_dtsec_get_clear_carry_regs() - Read and clear carry bits (CAR1-2 registers)
* @regs: Pointer to dTSEC register block
* @car1: car1 register value
* @car2: car2 register value
@@ -1043,18 +1041,19 @@ void dtsec_reset_stat(struct dtsec_regs *regs);
*
* Returns: true if overflow occurred, otherwise - false
*/
-bool dtsec_get_clear_carry_regs(struct dtsec_regs *regs,
- uint32_t *car1, uint32_t *car2);
+bool fman_dtsec_get_clear_carry_regs(struct dtsec_regs *regs,
+ uint32_t *car1, uint32_t *car2);
+
+uint32_t fman_dtsec_check_and_clear_tmr_event(struct dtsec_regs *regs);
-uint32_t dtsec_check_and_clear_tmr_event(struct dtsec_regs *regs);
+uint32_t fman_dtsec_get_stat_counter(struct dtsec_regs *regs,
+ enum dtsec_stat_counters reg_name);
-uint32_t dtsec_get_stat_counter(struct dtsec_regs *regs,
- enum dtsec_stat_counters reg_name);
+void fman_dtsec_start_tx(struct dtsec_regs *regs);
+void fman_dtsec_start_rx(struct dtsec_regs *regs);
+void fman_dtsec_stop_tx(struct dtsec_regs *regs);
+void fman_dtsec_stop_rx(struct dtsec_regs *regs);
+uint32_t fman_dtsec_get_rctrl(struct dtsec_regs *regs);
-void dtsec_start_tx(struct dtsec_regs *regs);
-void dtsec_start_rx(struct dtsec_regs *regs);
-void dtsec_stop_rx(struct dtsec_regs *regs);
-void dtsec_stop_tx(struct dtsec_regs *regs);
-uint32_t dtsec_get_rctrl(struct dtsec_regs *regs);
#endif /* __FSL_FMAN_DTSEC_H */
diff --git a/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_memac.h b/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_memac.h
index 5cf48c7..503eebb 100644
--- a/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_memac.h
+++ b/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_memac.h
@@ -68,6 +68,12 @@
#define IF_MODE_GMII 0x00000002 /* 30-31 GMII (1G) interface */
#define IF_MODE_RGMII 0x00000004
#define IF_MODE_RGMII_AUTO 0x00008000
+#define IF_MODE_RGMII_1000 0x00004000 /* 10 - 1000Mbps RGMII */
+#define IF_MODE_RGMII_100 0x00000000 /* 00 - 100Mbps RGMII */
+#define IF_MODE_RGMII_10 0x00002000 /* 01 - 10Mbps RGMII */
+#define IF_MODE_RGMII_SP_MASK 0x00006000 /* Setsp mask bits */
+#define IF_MODE_RGMII_FD 0x00001000 /* Full duplex RGMII */
+#define IF_MODE_HD 0x00000040 /* Half duplex operation */
/* Hash table Control Register (HASHTABLE_CTRL) */
#define HASH_CTRL_MCAST_SHIFT 26
@@ -86,12 +92,13 @@
#define STATS_CFG_SATURATE 0x00000001 /* 31 Saturate at the maximum val */
/* Interrupt Mask Register (IMASK) */
-#define MEMAC_IMASK_MGI 0x40000000 /* 1 Magic pkt detec indication */
+#define MEMAC_IMASK_MGI 0x40000000 /* 1 Magic pkt detect indication */
+#define MEMAC_IMASK_TSECC_ER 0x20000000 /* 2 Timestamp FIFO ECC error evnt */
#define MEMAC_IMASK_TECC_ER 0x02000000 /* 6 Transmit frame ECC error evnt */
#define MEMAC_IMASK_RECC_ER 0x01000000 /* 7 Receive frame ECC error evnt */
-#define MEMAC_ALL_IMASKS \
- ((uint32_t)(MEMAC_IMASK_MGI | \
+#define MEMAC_ALL_ERRS_IMASK \
+ ((uint32_t)(MEMAC_IMASK_TSECC_ER | \
MEMAC_IMASK_TECC_ER | \
MEMAC_IMASK_RECC_ER))
@@ -99,6 +106,7 @@
#define MEMAC_IEVNT_AN 0x40000000 /* Auto-negotiation */
#define MEMAC_IEVNT_LT 0x20000000 /* Link Training/New page */
#define MEMAC_IEVNT_MGI 0x00004000 /* Magic pkt detection */
+#define MEMAC_IEVNT_TS_ECC_ER 0x00002000 /* Timestamp FIFO ECC error */
#define MEMAC_IEVNT_RX_FIFO_OVFL 0x00001000 /* Rx FIFO overflow */
#define MEMAC_IEVNT_TX_FIFO_UNFL 0x00000800 /* Tx FIFO underflow */
#define MEMAC_IEVNT_TX_FIFO_OVFL 0x00000400 /* Tx FIFO overflow */
@@ -112,24 +120,6 @@
#define MEMAC_IEVNT_REM_FAULT 0x00000002 /* Remote fault (XGMII) */
#define MEMAC_IEVNT_LOC_FAULT 0x00000001 /* Local fault (XGMII) */
-#define MEMAC_EVENTS_MASK \
- ((uint32_t)(MEMAC_IEVNT_PCS | \
- MEMAC_IEVNT_AN | \
- MEMAC_IEVNT_LT | \
- MEMAC_IEVNT_MGI | \
- MEMAC_IEVNT_RX_FIFO_OVFL | \
- MEMAC_IEVNT_TX_FIFO_UNFL | \
- MEMAC_IEVNT_TX_FIFO_OVFL | \
- MEMAC_IEVNT_TX_ECC_ER | \
- MEMAC_IEVNT_RX_ECC_ER | \
- MEMAC_IEVNT_LI_FAULT | \
- MEMAC_IEVNT_RX_EMPTY | \
- MEMAC_IEVNT_TX_EMPTY | \
- MEMAC_IEVNT_RX_LOWP | \
- MEMAC_IEVNT_PHY_LOS | \
- MEMAC_IEVNT_REM_FAULT | \
- MEMAC_IEVNT_LOC_FAULT))
-
enum memac_counters {
E_MEMAC_COUNTER_R64,
E_MEMAC_COUNTER_R127,
@@ -337,45 +327,66 @@ struct memac_cfg {
uint32_t tx_ipg_length;
};
+
/**
- * memac_defconfig() - Get default MEMAC configuration
+ * fman_memac_defconfig() - Get default MEMAC configuration
* @cfg: pointer to configuration structure.
*
* Call this function to obtain a default set of configuration values for
* initializing MEMAC. The user can overwrite any of the values before calling
- * memac_init(), if specific configuration needs to be applied.
+ * fman_memac_init(), if specific configuration needs to be applied.
*/
-void memac_defconfig(struct memac_cfg *cfg);
-void memac_set_promiscuous(struct memac_regs *regs, bool val);
-void memac_hardware_add_addr_in_paddr(struct memac_regs *regs,
- uint8_t *adr,
- uint8_t paddr_num);
-void memac_hardware_clear_addr_in_paddr(struct memac_regs *regs,
- uint8_t paddr_num);
-void memac_enable(struct memac_regs *regs, bool apply_rx, bool apply_tx);
-void memac_disable(struct memac_regs *regs, bool apply_rx, bool apply_tx);
-uint64_t memac_get_counter(struct memac_regs *regs,
- enum memac_counters reg_name);
-void memac_set_tx_pause_frames(struct memac_regs *regs,
- uint8_t priority,
- uint16_t pauseTime,
- uint16_t threshTime);
-uint16_t memac_get_max_frame_length(struct memac_regs *regs);
-void memac_init(struct memac_regs *regs,
- struct memac_cfg *cfg,
- enum enet_interface enet_interface,
- enum enet_speed enet_speed,
- uint32_t exceptions);
-void memac_set_exception(struct memac_regs *regs, uint32_t val, bool enable);
-void memac_reset_counter(struct memac_regs *regs);
-void memac_reset(struct memac_regs *regs);
-void memac_set_hash_table(struct memac_regs *regs, uint32_t val);
-void memac_set_rx_ignore_pause_frames(struct memac_regs *regs,bool enable);
-void memac_set_loopback(struct memac_regs *regs, bool enable);
-void memac_reset_counter(struct memac_regs *regs);
-uint32_t memac_get_event(struct memac_regs *regs, uint32_t ev_mask);
-void memac_ack_event(struct memac_regs *regs, uint32_t ev_mask);
-uint32_t memac_get_interrupt_mask(struct memac_regs *regs);
+void fman_memac_defconfig(struct memac_cfg *cfg);
+
+int fman_memac_init(struct memac_regs *regs,
+ struct memac_cfg *cfg,
+ enum enet_interface enet_interface,
+ enum enet_speed enet_speed,
+ uint32_t exceptions);
+
+void fman_memac_enable(struct memac_regs *regs, bool apply_rx, bool apply_tx);
+
+void fman_memac_disable(struct memac_regs *regs, bool apply_rx, bool apply_tx);
+
+void fman_memac_set_promiscuous(struct memac_regs *regs, bool val);
+
+void fman_memac_add_addr_in_paddr(struct memac_regs *regs,
+ uint8_t *adr,
+ uint8_t paddr_num);
+
+void fman_memac_clear_addr_in_paddr(struct memac_regs *regs,
+ uint8_t paddr_num);
+
+uint64_t fman_memac_get_counter(struct memac_regs *regs,
+ enum memac_counters reg_name);
+
+void fman_memac_set_tx_pause_frames(struct memac_regs *regs,
+ uint8_t priority,
+ uint16_t pauseTime,
+ uint16_t threshTime);
+
+uint16_t fman_memac_get_max_frame_len(struct memac_regs *regs);
+
+void fman_memac_set_exception(struct memac_regs *regs, uint32_t val, bool enable);
+
+void fman_memac_reset_stat(struct memac_regs *regs);
+
+void fman_memac_reset(struct memac_regs *regs);
+
+void fman_memac_set_hash_table(struct memac_regs *regs, uint32_t val);
+
+void fman_memac_set_rx_ignore_pause_frames(struct memac_regs *regs,bool enable);
+
+uint32_t fman_memac_get_event(struct memac_regs *regs, uint32_t ev_mask);
+
+void fman_memac_ack_event(struct memac_regs *regs, uint32_t ev_mask);
+
+uint32_t fman_memac_get_interrupt_mask(struct memac_regs *regs);
+
+void fman_memac_adjust_link(struct memac_regs *regs,
+ enum enet_interface iface_mode,
+ enum enet_speed speed, bool full_dx);
+
#endif /*__FSL_FMAN_MEMAC_H*/
diff --git a/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_rtc.h b/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_rtc.h
new file mode 100755
index 0000000..aa6fd73
--- /dev/null
+++ b/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_rtc.h
@@ -0,0 +1,429 @@
+/*
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __FSL_FMAN_RTC_H
+#define __FSL_FMAN_RTC_H
+
+#include "common/general.h"
+
+/* FM RTC Registers definitions */
+#define FMAN_RTC_TMR_CTRL_ALMP1 0x80000000
+#define FMAN_RTC_TMR_CTRL_ALMP2 0x40000000
+#define FMAN_RTC_TMR_CTRL_FS 0x10000000
+#define FMAN_RTC_TMR_CTRL_PP1L 0x08000000
+#define FMAN_RTC_TMR_CTRL_PP2L 0x04000000
+#define FMAN_RTC_TMR_CTRL_TCLK_PERIOD_MASK 0x03FF0000
+#define FMAN_RTC_TMR_CTRL_FRD 0x00004000
+#define FMAN_RTC_TMR_CTRL_SLV 0x00002000
+#define FMAN_RTC_TMR_CTRL_ETEP1 0x00000100
+#define FMAN_RTC_TMR_CTRL_COPH 0x00000080
+#define FMAN_RTC_TMR_CTRL_CIPH 0x00000040
+#define FMAN_RTC_TMR_CTRL_TMSR 0x00000020
+#define FMAN_RTC_TMR_CTRL_DBG 0x00000010
+#define FMAN_RTC_TMR_CTRL_BYP 0x00000008
+#define FMAN_RTC_TMR_CTRL_TE 0x00000004
+#define FMAN_RTC_TMR_CTRL_CKSEL_OSC_CLK 0x00000003
+#define FMAN_RTC_TMR_CTRL_CKSEL_MAC_CLK 0x00000001
+#define FMAN_RTC_TMR_CTRL_CKSEL_EXT_CLK 0x00000000
+#define FMAN_RTC_TMR_CTRL_TCLK_PERIOD_SHIFT 16
+
+#define FMAN_RTC_TMR_TEVENT_ETS2 0x02000000
+#define FMAN_RTC_TMR_TEVENT_ETS1 0x01000000
+#define FMAN_RTC_TMR_TEVENT_ALM2 0x00020000
+#define FMAN_RTC_TMR_TEVENT_ALM1 0x00010000
+#define FMAN_RTC_TMR_TEVENT_PP1 0x00000080
+#define FMAN_RTC_TMR_TEVENT_PP2 0x00000040
+#define FMAN_RTC_TMR_TEVENT_PP3 0x00000020
+#define FMAN_RTC_TMR_TEVENT_ALL (FMAN_RTC_TMR_TEVENT_ETS2 |\
+ FMAN_RTC_TMR_TEVENT_ETS1 |\
+ FMAN_RTC_TMR_TEVENT_ALM2 |\
+ FMAN_RTC_TMR_TEVENT_ALM1 |\
+ FMAN_RTC_TMR_TEVENT_PP1 |\
+ FMAN_RTC_TMR_TEVENT_PP2 |\
+ FMAN_RTC_TMR_TEVENT_PP3)
+
+#define FMAN_RTC_TMR_PRSC_OCK_MASK 0x0000FFFF
+
+/**************************************************************************//**
+ @Description FM RTC Alarm Polarity Options.
+*//***************************************************************************/
+enum fman_rtc_alarm_polarity {
+ E_FMAN_RTC_ALARM_POLARITY_ACTIVE_HIGH, /**< Active-high output polarity */
+ E_FMAN_RTC_ALARM_POLARITY_ACTIVE_LOW /**< Active-low output polarity */
+};
+
+/**************************************************************************//**
+ @Description FM RTC Trigger Polarity Options.
+*//***************************************************************************/
+enum fman_rtc_trigger_polarity {
+ E_FMAN_RTC_TRIGGER_ON_RISING_EDGE, /**< Trigger on rising edge */
+ E_FMAN_RTC_TRIGGER_ON_FALLING_EDGE /**< Trigger on falling edge */
+};
+
+/**************************************************************************//**
+ @Description IEEE1588 Timer Module FM RTC Optional Clock Sources.
+*//***************************************************************************/
+enum fman_src_clock {
+ E_FMAN_RTC_SOURCE_CLOCK_EXTERNAL, /**< external high precision timer
+ reference clock */
+ E_FMAN_RTC_SOURCE_CLOCK_SYSTEM, /**< MAC system clock */
+ E_FMAN_RTC_SOURCE_CLOCK_OSCILATOR /**< RTC clock oscilator */
+};
+
+/* RTC default values */
+#define DEFAULT_SRC_CLOCK E_FMAN_RTC_SOURCE_CLOCK_SYSTEM
+#define DEFAULT_INVERT_INPUT_CLK_PHASE FALSE
+#define DEFAULT_INVERT_OUTPUT_CLK_PHASE FALSE
+#define DEFAULT_ALARM_POLARITY E_FMAN_RTC_ALARM_POLARITY_ACTIVE_HIGH
+#define DEFAULT_TRIGGER_POLARITY E_FMAN_RTC_TRIGGER_ON_FALLING_EDGE
+#define DEFAULT_PULSE_REALIGN FALSE
+
+#define FMAN_RTC_MAX_NUM_OF_ALARMS 3
+#define FMAN_RTC_MAX_NUM_OF_PERIODIC_PULSES 4
+#define FMAN_RTC_MAX_NUM_OF_EXT_TRIGGERS 3
+
+/**************************************************************************//**
+ @Description FM RTC timer alarm
+*//***************************************************************************/
+struct t_tmr_alarm{
+ uint32_t tmr_alarm_h; /**< */
+ uint32_t tmr_alarm_l; /**< */
+};
+
+/**************************************************************************//**
+ @Description FM RTC timer Ex trigger
+*//***************************************************************************/
+struct t_tmr_ext_trigger{
+ uint32_t tmr_etts_h; /**< */
+ uint32_t tmr_etts_l; /**< */
+};
+
+struct rtc_regs {
+ uint32_t tmr_id; /* 0x000 Module ID register */
+ uint32_t tmr_id2; /* 0x004 Controller ID register */
+ uint32_t reserved0008[30];
+ uint32_t tmr_ctrl; /* 0x0080 timer control register */
+ uint32_t tmr_tevent; /* 0x0084 timer event register */
+ uint32_t tmr_temask; /* 0x0088 timer event mask register */
+ uint32_t reserved008c[3];
+ uint32_t tmr_cnt_h; /* 0x0098 timer counter high register */
+ uint32_t tmr_cnt_l; /* 0x009c timer counter low register */
+ uint32_t tmr_add; /* 0x00a0 timer drift compensation addend register */
+ uint32_t tmr_acc; /* 0x00a4 timer accumulator register */
+ uint32_t tmr_prsc; /* 0x00a8 timer prescale */
+ uint32_t reserved00ac;
+ uint32_t tmr_off_h; /* 0x00b0 timer offset high */
+ uint32_t tmr_off_l; /* 0x00b4 timer offset low */
+ struct t_tmr_alarm tmr_alarm[FMAN_RTC_MAX_NUM_OF_ALARMS]; /* 0x00b8 timer
+ alarm */
+ uint32_t tmr_fiper[FMAN_RTC_MAX_NUM_OF_PERIODIC_PULSES]; /* 0x00d0 timer
+ fixed period interval */
+ struct t_tmr_ext_trigger tmr_etts[FMAN_RTC_MAX_NUM_OF_EXT_TRIGGERS];
+ /* 0x00e0 time stamp general purpose external */
+ uint32_t reserved00f0[4];
+};
+
+struct rtc_cfg {
+ enum fman_src_clock src_clk;
+ uint32_t ext_src_clk_freq;
+ uint32_t rtc_freq_hz;
+ bool timer_slave_mode;
+ bool invert_input_clk_phase;
+ bool invert_output_clk_phase;
+ uint32_t events_mask;
+ bool bypass; /**< Indicates if frequency compensation
+ is bypassed */
+ bool pulse_realign;
+ enum fman_rtc_alarm_polarity alarm_polarity[FMAN_RTC_MAX_NUM_OF_ALARMS];
+ enum fman_rtc_trigger_polarity trigger_polarity
+ [FMAN_RTC_MAX_NUM_OF_EXT_TRIGGERS];
+};
+
+/**
+ * fman_rtc_defconfig() - Get default RTC configuration
+ * @cfg: pointer to configuration structure.
+ *
+ * Call this function to obtain a default set of configuration values for
+ * initializing RTC. The user can overwrite any of the values before calling
+ * fman_rtc_init(), if specific configuration needs to be applied.
+ */
+void fman_rtc_defconfig(struct rtc_cfg *cfg);
+
+/**
+ * fman_rtc_get_events() - Get the events
+ * @regs: Pointer to RTC register block
+ *
+ * Returns: The events
+ */
+uint32_t fman_rtc_get_events(struct rtc_regs *regs);
+
+/**
+ * fman_rtc_get_interrupt_mask() - Get the events mask
+ * @regs: Pointer to RTC register block
+ *
+ * Returns: The events mask
+ */
+uint32_t fman_rtc_get_interrupt_mask(struct rtc_regs *regs);
+
+
+/**
+ * fman_rtc_set_interrupt_mask() - Set the events mask
+ * @regs: Pointer to RTC register block
+ * @mask: The mask to set
+ */
+void fman_rtc_set_interrupt_mask(struct rtc_regs *regs, uint32_t mask);
+
+/**
+ * fman_rtc_get_event() - Check if specific events occured
+ * @regs: Pointer to RTC register block
+ * @ev_mask: a mask of the events to check
+ *
+ * Returns: 0 if the events did not occur. Non zero if one of the events occured
+ */
+uint32_t fman_rtc_get_event(struct rtc_regs *regs, uint32_t ev_mask);
+
+/**
+ * fman_rtc_check_and_clear_event() - Clear events which are on
+ * @regs: Pointer to RTC register block
+ *
+ * Returns: A mask of the events which were cleared
+ */
+uint32_t fman_rtc_check_and_clear_event(struct rtc_regs *regs);
+
+/**
+ * fman_rtc_ack_event() - Clear events
+ * @regs: Pointer to RTC register block
+ * @events: The events to disable
+ */
+void fman_rtc_ack_event(struct rtc_regs *regs, uint32_t events);
+
+/**
+ * fman_rtc_enable_interupt() - Enable events interrupts
+ * @regs: Pointer to RTC register block
+ * @mask: The events to disable
+ */
+void fman_rtc_enable_interupt(struct rtc_regs *regs, uint32_t mask);
+
+/**
+ * fman_rtc_disable_interupt() - Disable events interrupts
+ * @regs: Pointer to RTC register block
+ * @mask: The events to disable
+ */
+void fman_rtc_disable_interupt(struct rtc_regs *regs, uint32_t mask);
+
+/**
+ * fman_rtc_get_timer_ctrl() - Get the control register
+ * @regs: Pointer to RTC register block
+ *
+ * Returns: The control register value
+ */
+uint32_t fman_rtc_get_timer_ctrl(struct rtc_regs *regs);
+
+/**
+ * fman_rtc_set_timer_ctrl() - Set timer control register
+ * @regs: Pointer to RTC register block
+ * @val: The value to set
+ */
+void fman_rtc_set_timer_ctrl(struct rtc_regs *regs, uint32_t val);
+
+/**
+ * fman_rtc_get_frequency_compensation() - Get the frequency compensation
+ * @regs: Pointer to RTC register block
+ *
+ * Returns: The timer counter
+ */
+uint32_t fman_rtc_get_frequency_compensation(struct rtc_regs *regs);
+
+/**
+ * fman_rtc_set_frequency_compensation() - Set frequency compensation
+ * @regs: Pointer to RTC register block
+ * @val: The value to set
+ */
+void fman_rtc_set_frequency_compensation(struct rtc_regs *regs, uint32_t val);
+
+/**
+ * fman_rtc_get_trigger_stamp() - Get a trigger stamp
+ * @regs: Pointer to RTC register block
+ * @id: The id of the trigger stamp
+ *
+ * Returns: The time stamp
+ */
+uint64_t fman_rtc_get_trigger_stamp(struct rtc_regs *regs, int id);
+
+/**
+ * fman_rtc_set_timer_alarm_l() - Set timer alarm low register
+ * @regs: Pointer to RTC register block
+ * @index: The index of alarm to set
+ * @val: The value to set
+ */
+void fman_rtc_set_timer_alarm_l(struct rtc_regs *regs, int index,
+ uint32_t val);
+
+/**
+ * fman_rtc_set_timer_alarm() - Set timer alarm
+ * @regs: Pointer to RTC register block
+ * @index: The index of alarm to set
+ * @val: The value to set
+ */
+void fman_rtc_set_timer_alarm(struct rtc_regs *regs, int index, int64_t val);
+
+/**
+ * fman_rtc_set_timer_fiper() - Set timer fiper
+ * @regs: Pointer to RTC register block
+ * @index: The index of fiper to set
+ * @val: The value to set
+ */
+void fman_rtc_set_timer_fiper(struct rtc_regs *regs, int index, uint32_t val);
+
+/**
+ * fman_rtc_set_timer_offset() - Set timer offset
+ * @regs: Pointer to RTC register block
+ * @val: The value to set
+ */
+void fman_rtc_set_timer_offset(struct rtc_regs *regs, int64_t val);
+
+/**
+ * fman_rtc_get_timer() - Get the timer counter
+ * @regs: Pointer to RTC register block
+ *
+ * Returns: The timer counter
+ */
+static inline uint64_t fman_rtc_get_timer(struct rtc_regs *regs)
+{
+ uint64_t time;
+ /* TMR_CNT_L must be read first to get an accurate value */
+ time = (uint64_t)ioread32be(&regs->tmr_cnt_l);
+ time |= ((uint64_t)ioread32be(&regs->tmr_cnt_h) << 32);
+
+ return time;
+}
+
+/**
+ * fman_rtc_set_timer() - Set timer counter
+ * @regs: Pointer to RTC register block
+ * @val: The value to set
+ */
+static inline void fman_rtc_set_timer(struct rtc_regs *regs, int64_t val)
+{
+ iowrite32be((uint32_t)val, &regs->tmr_cnt_l);
+ iowrite32be((uint32_t)(val >> 32), &regs->tmr_cnt_h);
+}
+
+/**
+ * fman_rtc_timers_soft_reset() - Soft reset
+ * @regs: Pointer to RTC register block
+ *
+ * Resets all the timer registers and state machines for the 1588 IP and
+ * the attached client 1588
+ */
+void fman_rtc_timers_soft_reset(struct rtc_regs *regs);
+
+/**
+ * fman_rtc_clear_external_trigger() - Clear an external trigger
+ * @regs: Pointer to RTC register block
+ * @id: The id of the trigger to clear
+ */
+void fman_rtc_clear_external_trigger(struct rtc_regs *regs, int id);
+
+/**
+ * fman_rtc_clear_periodic_pulse() - Clear periodic pulse
+ * @regs: Pointer to RTC register block
+ * @id: The id of the fiper to clear
+ */
+void fman_rtc_clear_periodic_pulse(struct rtc_regs *regs, int id);
+
+/**
+ * fman_rtc_enable() - Enable RTC hardware block
+ * @regs: Pointer to RTC register block
+ */
+void fman_rtc_enable(struct rtc_regs *regs, bool reset_clock);
+
+/**
+ * fman_rtc_is_enabled() - Is RTC hardware block enabled
+ * @regs: Pointer to RTC register block
+ *
+ * Return: TRUE if enabled
+ */
+bool fman_rtc_is_enabled(struct rtc_regs *regs);
+
+/**
+ * fman_rtc_disable() - Disable RTC hardware block
+ * @regs: Pointer to RTC register block
+ */
+void fman_rtc_disable(struct rtc_regs *regs);
+
+/**
+ * fman_rtc_init() - Init RTC hardware block
+ * @cfg: RTC configuration data
+ * @regs: Pointer to RTC register block
+ * @num_alarms: Number of alarms in RTC
+ * @num_fipers: Number of fipers in RTC
+ * @num_ext_triggers: Number of external triggers in RTC
+ * @freq_compensation: Frequency compensation
+ * @output_clock_divisor: Output clock divisor
+ *
+ * This function initializes RTC and applies basic configuration.
+ */
+void fman_rtc_init(struct rtc_cfg *cfg, struct rtc_regs *regs, int num_alarms,
+ int num_fipers, int num_ext_triggers, bool init_freq_comp,
+ uint32_t freq_compensation, uint32_t output_clock_divisor);
+
+/**
+ * fman_rtc_set_alarm() - Set an alarm
+ * @regs: Pointer to RTC register block
+ * @id: id of alarm
+ * @val: value to write
+ * @enable: should interrupt be enabled
+ */
+void fman_rtc_set_alarm(struct rtc_regs *regs, int id, uint32_t val, bool enable);
+
+/**
+ * fman_rtc_set_periodic_pulse() - Set an alarm
+ * @regs: Pointer to RTC register block
+ * @id: id of fiper
+ * @val: value to write
+ * @enable: should interrupt be enabled
+ */
+void fman_rtc_set_periodic_pulse(struct rtc_regs *regs, int id, uint32_t val,
+ bool enable);
+
+/**
+ * fman_rtc_set_ext_trigger() - Set an external trigger
+ * @regs: Pointer to RTC register block
+ * @id: id of trigger
+ * @enable: should interrupt be enabled
+ * @use_pulse_as_input: use the pulse as input
+ */
+void fman_rtc_set_ext_trigger(struct rtc_regs *regs, int id, bool enable,
+ bool use_pulse_as_input);
+
+#endif /* __FSL_FMAN_RTC_H */
diff --git a/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_sp.h b/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_sp.h
new file mode 100755
index 0000000..f8ef7d5
--- /dev/null
+++ b/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_sp.h
@@ -0,0 +1,138 @@
+/*
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __FSL_FMAN_SP_H
+#define __FSL_FMAN_SP_H
+
+#include "common/general.h"
+#include "fsl_fman.h"
+
+
+struct fm_pcd_storage_profile_regs{
+ uint32_t fm_sp_ebmpi[8];
+ /*offset 0 - 0xc*/
+ /**< Buffer Manager pool Information */
+
+ uint32_t fm_sp_acnt; /*offset 0x20*/
+ uint32_t fm_sp_ebm; /*offset 0x24*/
+ uint32_t fm_sp_da; /*offset 0x28*/
+ uint32_t fm_sp_icp; /*offset 0x2c*/
+ uint32_t fm_sp_mpd; /*offset 0x30*/
+ uint32_t res1[2]; /*offset 0x34 - 0x38*/
+ uint32_t fm_sp_spliodn; /*offset 0x3c*/
+};
+
+/**************************************************************************//**
+ @Description structure for defining internal context copying
+*//***************************************************************************/
+struct fman_sp_int_context_data_copy{
+ uint16_t ext_buf_offset; /**< Offset in External buffer to which
+ internal context is copied to (Rx)
+ or taken from (Tx, Op). */
+ uint8_t int_context_offset; /**< Offset within internal context to copy
+ from (Rx) or to copy to (Tx, Op).*/
+ uint16_t size; /**< Internal offset size to be copied */
+};
+
+/**************************************************************************//**
+ @Description struct for defining external buffer margins
+*//***************************************************************************/
+struct fman_sp_buf_margins{
+ uint16_t start_margins; /**< Number of bytes to be left at the
+ beginning of the external buffer (must be
+ divisible by 16) */
+ uint16_t end_margins; /**< number of bytes to be left at the end of
+ the external buffer(must be divisible by 16)*/
+};
+
+struct fm_storage_profile_params {
+ struct fman_ext_pools fm_ext_pools;
+ struct fman_backup_bm_pools backup_pools;
+ struct fman_sp_int_context_data_copy *int_context;
+ struct fman_sp_buf_margins *buf_margins;
+ enum fman_dma_swap_option dma_swap_data;
+ enum fman_dma_cache_option int_context_cache_attr;
+ enum fman_dma_cache_option header_cache_attr;
+ enum fman_dma_cache_option scatter_gather_cache_attr;
+ bool dma_write_optimize;
+ uint16_t liodn_offset;
+ bool no_scather_gather;
+ struct fman_buf_pool_depletion buf_pool_depletion;
+};
+
+/**************************************************************************//**
+ @Description Registers bit fields
+*//***************************************************************************/
+#define FMAN_SP_EXT_BUF_POOL_EN_COUNTER 0x40000000
+#define FMAN_SP_EXT_BUF_POOL_VALID 0x80000000
+#define FMAN_SP_EXT_BUF_POOL_BACKUP 0x20000000
+#define FMAN_SP_DMA_ATTR_WRITE_OPTIMIZE 0x00100000
+#define FMAN_SP_SG_DISABLE 0x80000000
+
+/* shifts */
+#define FMAN_SP_EXT_BUF_POOL_ID_SHIFT 16
+#define FMAN_SP_POOL_DEP_NUM_OF_POOLS_SHIFT 16
+#define FMAN_SP_EXT_BUF_MARG_START_SHIFT 16
+#define FMAN_SP_EXT_BUF_MARG_END_SHIFT 0
+#define FMAN_SP_DMA_ATTR_SWP_SHIFT 30
+#define FMAN_SP_DMA_ATTR_IC_CACHE_SHIFT 28
+#define FMAN_SP_DMA_ATTR_HDR_CACHE_SHIFT 26
+#define FMAN_SP_DMA_ATTR_SG_CACHE_SHIFT 24
+#define FMAN_SP_IC_TO_EXT_SHIFT 16
+#define FMAN_SP_IC_FROM_INT_SHIFT 8
+#define FMAN_SP_IC_SIZE_SHIFT 0
+
+/**************************************************************************//**
+ @Description defaults
+*//***************************************************************************/
+#define DEFAULT_FMAN_SP_DMA_SWAP_DATA FMAN_DMA_NO_SWP
+#define DEFAULT_FMAN_SP_DMA_INT_CONTEXT_CACHE_ATTR FMAN_DMA_NO_STASH
+#define DEFAULT_FMAN_SP_DMA_HEADER_CACHE_ATTR FMAN_DMA_NO_STASH
+#define DEFAULT_FMAN_SP_DMA_SCATTER_GATHER_CACHE_ATTR FMAN_DMA_NO_STASH
+#define DEFAULT_FMAN_SP_DMA_WRITE_OPTIMIZE TRUE
+#define DEFAULT_FMAN_SP_NO_SCATTER_GATHER FALSE
+
+void fman_vsp_defconfig(struct fm_storage_profile_params *cfg);
+
+void fman_vsp_init(struct fm_pcd_storage_profile_regs *regs,
+ uint16_t index, struct fm_storage_profile_params *fm_vsp_params,
+ int port_max_num_of_ext_pools, int bm_max_num_of_pools,
+ int max_num_of_pfc_priorities);
+
+uint32_t fman_vsp_get_statistics(struct fm_pcd_storage_profile_regs *regs,
+ uint16_t index);
+
+void fman_vsp_set_statistics(struct fm_pcd_storage_profile_regs *regs,
+ uint16_t index, uint32_t value);
+
+
+#endif /* __FSL_FMAN_SP_H */
diff --git a/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_tgec.h b/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_tgec.h
index 2505888..b95ef37 100644
--- a/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_tgec.h
+++ b/drivers/net/ethernet/freescale/fman/inc/flib/fsl_fman_tgec.h
@@ -328,8 +328,8 @@ struct tgec_regs {
* (increasing bandwidth).
*
* This structure contains basic TGEC configuration and must be passed to
- * tgec_init() function. A default set of configuration values can be obtained
- * by calling tgec_defconfig().
+ * fman_tgec_init() function. A default set of configuration values can be obtained
+ * by calling fman_tgec_defconfig().
*/
struct tgec_cfg {
bool rx_error_discard;
@@ -350,46 +350,66 @@ struct tgec_cfg {
bool skip_fman11_workaround;
};
-void tgec_set_mac_address(struct tgec_regs *regs, uint8_t *macaddr);
+
+void fman_tgec_defconfig(struct tgec_cfg *cfg);
+
+/**
+ * fman_tgec_init() - Init tgec hardware block
+ * @regs: Pointer to tgec register block
+ * @cfg: tgec configuration data
+ * @exceptions_mask: initial exceptions mask
+ *
+ * This function initializes the tgec controller and applies its
+ * basic configuration.
+ *
+ * Returns: 0 if successful, an error code otherwise.
+ */
+
+int fman_tgec_init(struct tgec_regs *regs, struct tgec_cfg *cfg,
+ uint32_t exception_mask);
+
+void fman_tgec_enable(struct tgec_regs *regs, bool apply_rx, bool apply_tx);
+
+void fman_tgec_disable(struct tgec_regs *regs, bool apply_rx, bool apply_tx);
+
+uint32_t fman_tgec_get_revision(struct tgec_regs *regs);
+
+void fman_tgec_set_mac_address(struct tgec_regs *regs, uint8_t *macaddr);
+
+void fman_tgec_set_promiscuous(struct tgec_regs *regs, bool val);
/**
- * tgec_reset_stat() - Completely resets all TGEC HW counters
+ * fman_tgec_reset_stat() - Completely resets all TGEC HW counters
* @regs: Pointer to TGEC register block
*/
-void tgec_reset_stat(struct tgec_regs *regs);
+void fman_tgec_reset_stat(struct tgec_regs *regs);
/**
- * tgec_get_counter() - Reads TGEC HW counters
+ * fman_tgec_get_counter() - Reads TGEC HW counters
* @regs: Pointer to TGEC register block
* @reg_name: Counter name according to the appropriate enum
*
* Returns: Required counter value
*/
-
-uint64_t tgec_get_counter(struct tgec_regs *regs, enum tgec_counters reg_name);
-
-void tgec_enable(struct tgec_regs *regs, bool apply_rx, bool apply_tx);
-void tgec_disable(struct tgec_regs *regs, bool apply_rx, bool apply_tx);
-void tgec_set_promiscuous(struct tgec_regs *regs, bool val);
+uint64_t fman_tgec_get_counter(struct tgec_regs *regs, enum tgec_counters reg_name);
/**
- * tgec_set_hash_table() - Sets the Hashtable Control Register
+ * fman_tgec_set_hash_table() - Sets the Hashtable Control Register
* @regs: Pointer to TGEC register block
* @value: Value to be written in Hashtable Control Register
*/
-void tgec_set_hash_table(struct tgec_regs *regs, uint32_t value);
+void fman_tgec_set_hash_table(struct tgec_regs *regs, uint32_t value);
/**
- * tgec_tx_mac_pause() - Sets the Pause Quanta Register
+ * fman_tgec_set_tx_pause_frames() - Sets the Pause Quanta Register
* @regs: Pointer to TGEC register block
* @pause_time: Pause quanta value used with transmitted pause frames.
* Each quanta represents a 512 bit-times
*/
-
-void tgec_tx_mac_pause(struct tgec_regs *regs, uint16_t pause_time);
+void fman_tgec_set_tx_pause_frames(struct tgec_regs *regs, uint16_t pause_time);
/**
- * tgec_rx_ignore_mac_pause() - Changes the policy WRT pause frames
+ * fman_tgec_set_rx_ignore_pause_frames() - Changes the policy WRT pause frames
* @regs: Pointer to TGEC register block
* @en: Ignore/Respond to pause frame quanta
*
@@ -398,11 +418,10 @@ void tgec_tx_mac_pause(struct tgec_regs *regs, uint16_t pause_time);
* in the Pause frame quanta of a received Pause frame.
* 1 - MAC ignores received Pause frames.
*/
-
-void tgec_rx_ignore_mac_pause(struct tgec_regs *regs, bool en);
+void fman_tgec_set_rx_ignore_pause_frames(struct tgec_regs *regs, bool en);
/**
- * tgec_enable_1588_time_stamp() - change timestamp functionality
+ * fman_tgec_enable_1588_time_stamp() - change timestamp functionality
* @regs: Pointer to TGEC register block
* @en: enable/disable timestamp functionality
*
@@ -411,62 +430,42 @@ void tgec_rx_ignore_mac_pause(struct tgec_regs *regs, bool en);
* 0 disabled, 1 enabled
*/
-void tgec_enable_1588_time_stamp(struct tgec_regs *regs, bool en);
+void fman_tgec_enable_1588_time_stamp(struct tgec_regs *regs, bool en);
+
+uint32_t fman_tgec_get_event(struct tgec_regs *regs, uint32_t ev_mask);
-uint32_t tgec_get_event(struct tgec_regs *regs, uint32_t ev_mask);
-void tgec_ack_event(struct tgec_regs *regs, uint32_t ev_mask);
-uint32_t tgec_get_interrupt_mask(struct tgec_regs *regs);
+void fman_tgec_ack_event(struct tgec_regs *regs, uint32_t ev_mask);
+uint32_t fman_tgec_get_interrupt_mask(struct tgec_regs *regs);
/**
- * tgec_add_addr_in_paddr() - Sets additional exact match MAC address
+ * fman_tgec_add_addr_in_paddr() - Sets additional exact match MAC address
* @regs: Pointer to TGEC register block
* @addr_ptr: Pointer to 6-byte array containing the MAC address
*
* Sets the additional station MAC address
*/
+void fman_tgec_add_addr_in_paddr(struct tgec_regs *regs, uint8_t *addr_ptr);
-void tgec_add_addr_in_paddr(struct tgec_regs *regs, uint8_t *addr_ptr);
-void tgec_clear_addr_in_paddr(struct tgec_regs *regs);
-uint32_t tgec_get_revision(struct tgec_regs *regs);
-void tgec_enable_interrupt(struct tgec_regs *regs, uint32_t ev_mask);
-void tgec_disable_interrupt(struct tgec_regs *regs, uint32_t ev_mask);
+void fman_tgec_clear_addr_in_paddr(struct tgec_regs *regs);
-/**
- * tgec_get_max_frame_len() - Returns the maximum frame length value
- * @regs: Pointer to TGEC register block
- */
+void fman_tgec_enable_interrupt(struct tgec_regs *regs, uint32_t ev_mask);
-uint16_t tgec_get_max_frame_len(struct tgec_regs *regs);
+void fman_tgec_disable_interrupt(struct tgec_regs *regs, uint32_t ev_mask);
/**
- * tgec_defconfig() - Initialize the main tgec configuration parameters
- * @cfg: Pointer to tgec_cfg structure
- *
- * This routine determines the values of the tgec_cfg structure members.
- * This structure represents the initial parameters which the tgec controller
- * will be initialized with later when calling the tgec_init function.
+ * fman_tgec_get_max_frame_len() - Returns the maximum frame length value
+ * @regs: Pointer to TGEC register block
*/
-
-void tgec_defconfig(struct tgec_cfg *cfg);
+uint16_t fman_tgec_get_max_frame_len(struct tgec_regs *regs);
/**
- * tgec_init() - Init tgec hardware block
- * @regs: Pointer to tgec register block
- * @cfg: tgec configuration data
- * @exceptions_mask: initial exceptions mask
- *
- * This function initializes the tgec controller and applies its
- * basic configuration.
+ * fman_tgec_set_erratum_tx_fifo_corruption_10gmac_a007() - Initialize the main tgec configuration parameters
+ * @regs: Pointer to TGEC register block
*
- * Returns: 0 if successful, an error code otherwise.
+ * TODO
*/
-
-int tgec_init(struct tgec_regs *regs, struct tgec_cfg *cfg,
- uint32_t exception_mask);
-
-
-void tgec_fm_tx_fifo_corruption_errata_10gmac_a007(struct tgec_regs *regs);
+void fman_tgec_set_erratum_tx_fifo_corruption_10gmac_a007(struct tgec_regs *regs);
#endif /* __FSL_FMAN_TGEC_H */