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path: root/arch/mips/include/asm/cpu-features.h
AgeCommit message (Expand)Author
2012-10-11MIPS: Add detection of DSP ASE Revision 2.Steven J. Hill
2012-10-11MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt)Al Cooper
2012-09-13MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'.Steven J. Hill
2012-09-13MIPS: Add base architecture support for RI and XI.Steven J. Hill
2010-08-05MIPS: Update comment for cpu_has_clo_clzRalf Baechle
2010-02-27MIPS: Implement Read Inhibit/eXecute InhibitDavid Daney
2010-02-02MIPS: 64-bit: Detect virtual memory sizeGuenter Roeck
2009-09-17MIPS: Allow kernel use of LL/SC to be separate from the presence of LL/SC.David Daney
2009-06-17MIPS: Allow CPU specific overriding of CP0 hwrena impl bits.David Daney
2009-06-17MIPS: Allow R2 CPUs to turn off generation of 'ehb' instructions.David Daney
2009-05-14MIPS: Enable CLO / CLZ instructions via separate CPU propertyRalf Baechle
2009-01-11MIPS: Hook Cavium OCTEON cache init into cache.cDavid Daney
2008-10-30MIPS: New feature test macro cpu_has_mips_rRalf Baechle
2008-10-11MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle