diff options
author | Stefan Chulski <stefanc@marvell.com> | 2017-08-09 07:37:45 (GMT) |
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committer | Stefan Roese <sr@denx.de> | 2017-08-10 06:33:02 (GMT) |
commit | 73f592fb724153f8afbd79098f918ff548fda7ef (patch) | |
tree | fe06823f345f521c510a4e6e5765dcd39c6086cf | |
parent | 377883f16d360f7edf766ebf4d025db1b7f0fff0 (diff) | |
download | u-boot-fsl-qoriq-73f592fb724153f8afbd79098f918ff548fda7ef.tar.xz |
net: mvpp2x: Enable GoP packet padding in TX
This patch enables padding of packets shorter than 64B in TX(set by default).
Disabling of padding causes crashes on MACCIATO board.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
-rw-r--r-- | drivers/net/mvpp2.c | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c index 1264f14..3083111 100644 --- a/drivers/net/mvpp2.c +++ b/drivers/net/mvpp2.c @@ -3063,10 +3063,6 @@ static void gop_gmac_sgmii2_5_cfg(struct mvpp2_port *port) val |= MVPP2_GMAC_CTRL4_QSGMII_BYPASS_ACTIVE_MASK; writel(val, port->base + MVPP2_GMAC_CTRL_4_REG); - val = readl(port->base + MVPP2_GMAC_CTRL_2_REG); - val |= MVPP2_GMAC_PORT_DIS_PADING_MASK; - writel(val, port->base + MVPP2_GMAC_CTRL_2_REG); - val = readl(port->base + MVPP2_GMAC_CTRL_0_REG); /* * Configure GIG MAC to 1000Base-X mode connected to a fiber @@ -3109,10 +3105,6 @@ static void gop_gmac_sgmii_cfg(struct mvpp2_port *port) val |= MVPP2_GMAC_CTRL4_QSGMII_BYPASS_ACTIVE_MASK; writel(val, port->base + MVPP2_GMAC_CTRL_4_REG); - val = readl(port->base + MVPP2_GMAC_CTRL_2_REG); - val |= MVPP2_GMAC_PORT_DIS_PADING_MASK; - writel(val, port->base + MVPP2_GMAC_CTRL_2_REG); - val = readl(port->base + MVPP2_GMAC_CTRL_0_REG); /* configure GIG MAC to SGMII mode */ val &= ~MVPP2_GMAC_PORT_TYPE_MASK; @@ -3151,10 +3143,6 @@ static void gop_gmac_rgmii_cfg(struct mvpp2_port *port) val |= MVPP2_GMAC_CTRL4_EXT_PIN_GMII_SEL_MASK; writel(val, port->base + MVPP2_GMAC_CTRL_4_REG); - val = readl(port->base + MVPP2_GMAC_CTRL_2_REG); - val &= ~MVPP2_GMAC_PORT_DIS_PADING_MASK; - writel(val, port->base + MVPP2_GMAC_CTRL_2_REG); - val = readl(port->base + MVPP2_GMAC_CTRL_0_REG); /* configure GIG MAC to SGMII mode */ val &= ~MVPP2_GMAC_PORT_TYPE_MASK; |