diff options
| author | Sonic Zhang <sonic.zhang@analog.com> | 2009-07-20 15:05:37 (GMT) |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-07-20 23:38:44 (GMT) |
| commit | 0ecf24ef49d4f46ff5d6af357c3b9ec8d798160d (patch) | |
| tree | d223050f828261457c17204bc830fe1c6b12c24e | |
| parent | 23198fda7182969b619613a555f8645fdc3dc334 (diff) | |
| download | linux-fsl-qoriq-0ecf24ef49d4f46ff5d6af357c3b9ec8d798160d.tar.xz | |
blackfin: fix wrong CTS inversion
The Blackfin serial headers were inverting the CTS value leading to wrong
handling of the CTS line which broke CTS/RTS handling completely.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
6 files changed, 6 insertions, 6 deletions
diff --git a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h index 0fb2ce5..dbade93 100644 --- a/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h @@ -53,7 +53,7 @@ #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) -#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) +#define UART_GET_CTS(x) gpio_get_value(x->cts_pin) #define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) #define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) diff --git a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h index a625659..ebd6ceb 100644 --- a/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h @@ -53,7 +53,7 @@ #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) -#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) +#define UART_GET_CTS(x) gpio_get_value(x->cts_pin) #define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) #define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) diff --git a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h index a3789d7..4062e24 100644 --- a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h @@ -53,7 +53,7 @@ #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) -#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) +#define UART_GET_CTS(x) gpio_get_value(x->cts_pin) #define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) #define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) diff --git a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h index b86662f..e95d54f 100644 --- a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h @@ -53,7 +53,7 @@ #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) -#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) +#define UART_GET_CTS(x) gpio_get_value(x->cts_pin) #define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) #define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) diff --git a/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h index c536551..999f239 100644 --- a/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h @@ -53,7 +53,7 @@ #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) -#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) +#define UART_GET_CTS(x) gpio_get_value(x->cts_pin) #define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) #define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) diff --git a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h index a1b5087..fd5e887 100644 --- a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h @@ -53,7 +53,7 @@ #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) -#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin)) +#define UART_GET_CTS(x) gpio_get_value(x->cts_pin) #define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) #define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) |