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| author | Seungwon Jeon <tgih.jun@samsung.com> | 2013-10-09 15:12:21 (GMT) |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2013-10-09 15:12:21 (GMT) |
| commit | 18edf4512cfa3e3662bdbdfc5f11c2eb20721734 (patch) | |
| tree | 582baf8a2fde7234af6bb53e895ba4c78a8411ed | |
| parent | f8db3c9086cd33ee3efc913ade291694f54a57f2 (diff) | |
| download | linux-fsl-qoriq-18edf4512cfa3e3662bdbdfc5f11c2eb20721734.tar.xz | |
PCI: designware: Add header guards
Add header guards to prevent redundant inclusion.
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
| -rw-r--r-- | drivers/pci/host/pcie-designware.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h index faccbbf..d87fbae 100644 --- a/drivers/pci/host/pcie-designware.h +++ b/drivers/pci/host/pcie-designware.h @@ -11,6 +11,9 @@ * published by the Free Software Foundation. */ +#ifndef _PCIE_DESIGNWARE_H +#define _PCIE_DESIGNWARE_H + struct pcie_port_info { u32 cfg0_size; u32 cfg1_size; @@ -77,3 +80,5 @@ int dw_pcie_host_init(struct pcie_port *pp); int dw_pcie_setup(int nr, struct pci_sys_data *sys); struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys); int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); + +#endif /* _PCIE_DESIGNWARE_H */ |