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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2008-01-11 19:48:00 (GMT) |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2008-01-11 19:48:00 (GMT) |
commit | 22fb53c943b0ad4f86639bccb7ad8753be8ce435 (patch) | |
tree | 6051a0be08c1af5b1047014dbaffdb0fd8e65e8a | |
parent | 8dab63761219d7bc6a7d7d3b5f0fca76af5533a5 (diff) | |
parent | e452e94e21e8f4a3c2ff045b301ca21c1f6d03bf (diff) | |
download | linux-fsl-qoriq-22fb53c943b0ad4f86639bccb7ad8753be8ce435.tar.xz |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
[MIPS] Replace 40c7869b693b18412491fdcff64682215b739f9e kludge
[MIPS] Lasat: Fix built in separate object directory.
[MIPS] Malta: Fix software reset on big endian
[MIPS] pnx8xxx: move to clocksource
[MIPS] Wrong CONFIG option prevents setup of DMA zone.
-rw-r--r-- | arch/mips/kernel/setup.c | 7 | ||||
-rw-r--r-- | arch/mips/lasat/image/Makefile | 6 | ||||
-rw-r--r-- | arch/mips/mips-boards/generic/memory.c | 2 | ||||
-rw-r--r-- | arch/mips/mips-boards/generic/reset.c | 10 | ||||
-rw-r--r-- | arch/mips/mm/dma-default.c | 2 | ||||
-rw-r--r-- | arch/mips/philips/pnx8550/common/time.c | 109 |
6 files changed, 85 insertions, 51 deletions
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 7f6ddcb..f8a535a 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -269,7 +269,7 @@ static void __init bootmem_init(void) static void __init bootmem_init(void) { - unsigned long init_begin, reserved_end; + unsigned long reserved_end; unsigned long mapstart = ~0UL; unsigned long bootmap_size; int i; @@ -344,7 +344,6 @@ static void __init bootmem_init(void) min_low_pfn, max_low_pfn); - init_begin = PFN_UP(__pa_symbol(&__init_begin)); for (i = 0; i < boot_mem_map.nr_map; i++) { unsigned long start, end; @@ -352,8 +351,8 @@ static void __init bootmem_init(void) end = PFN_DOWN(boot_mem_map.map[i].addr + boot_mem_map.map[i].size); - if (start <= init_begin) - start = init_begin; + if (start <= min_low_pfn) + start = min_low_pfn; if (start >= end) continue; diff --git a/arch/mips/lasat/image/Makefile b/arch/mips/lasat/image/Makefile index 5332449..460626b 100644 --- a/arch/mips/lasat/image/Makefile +++ b/arch/mips/lasat/image/Makefile @@ -12,11 +12,11 @@ endif MKLASATIMG = mklasatimg MKLASATIMG_ARCH = mq2,mqpro,sp100,sp200 -KERNEL_IMAGE = $(TOPDIR)/vmlinux +KERNEL_IMAGE = vmlinux KERNEL_START = $(shell $(NM) $(KERNEL_IMAGE) | grep " _text" | cut -f1 -d\ ) KERNEL_ENTRY = $(shell $(NM) $(KERNEL_IMAGE) | grep kernel_entry | cut -f1 -d\ ) -LDSCRIPT= -L$(obj) -Tromscript.normal +LDSCRIPT= -L$(srctree)/$(src) -Tromscript.normal HEAD_DEFINES := -D_kernel_start=0x$(KERNEL_START) \ -D_kernel_entry=0x$(KERNEL_ENTRY) \ @@ -24,7 +24,7 @@ HEAD_DEFINES := -D_kernel_start=0x$(KERNEL_START) \ -D TIMESTAMP=$(shell date +%s) $(obj)/head.o: $(obj)/head.S $(KERNEL_IMAGE) - $(CC) -fno-pic $(HEAD_DEFINES) -I$(TOPDIR)/include -c -o $@ $< + $(CC) -fno-pic $(HEAD_DEFINES) $(LINUXINCLUDE) -c -o $@ $< OBJECTS = head.o kImage.o diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c index 2c5c27c..dc272c1 100644 --- a/arch/mips/mips-boards/generic/memory.c +++ b/arch/mips/mips-boards/generic/memory.c @@ -169,7 +169,6 @@ void __init prom_meminit(void) void __init prom_free_prom_memory(void) { -#if 0 /* for now ... */ unsigned long addr; int i; @@ -181,5 +180,4 @@ void __init prom_free_prom_memory(void) free_init_pages("prom memory", addr, addr + boot_mem_map.map[i].size); } -#endif } diff --git a/arch/mips/mips-boards/generic/reset.c b/arch/mips/mips-boards/generic/reset.c index 7a1bb51..583d468 100644 --- a/arch/mips/mips-boards/generic/reset.c +++ b/arch/mips/mips-boards/generic/reset.c @@ -39,16 +39,18 @@ static void atlas_machine_power_off(void); static void mips_machine_restart(char *command) { - unsigned int __iomem *softres_reg = ioremap(SOFTRES_REG, sizeof(unsigned int)); + unsigned int __iomem *softres_reg = + ioremap(SOFTRES_REG, sizeof(unsigned int)); - writew(GORESET, softres_reg); + __raw_writel(GORESET, softres_reg); } static void mips_machine_halt(void) { - unsigned int __iomem *softres_reg = ioremap(SOFTRES_REG, sizeof(unsigned int)); + unsigned int __iomem *softres_reg = + ioremap(SOFTRES_REG, sizeof(unsigned int)); - writew(GORESET, softres_reg); + __raw_writel(GORESET, softres_reg); } #if defined(CONFIG_MIPS_ATLAS) diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c index ae76795..810535d 100644 --- a/arch/mips/mm/dma-default.c +++ b/arch/mips/mm/dma-default.c @@ -45,7 +45,7 @@ static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp) /* ignore region specifiers */ gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM); -#ifdef CONFIG_ZONE_DMA32 +#ifdef CONFIG_ZONE_DMA if (dev == NULL) gfp |= __GFP_DMA; else if (dev->coherent_dma_mask < DMA_BIT_MASK(24)) diff --git a/arch/mips/philips/pnx8550/common/time.c b/arch/mips/philips/pnx8550/common/time.c index e818fd0..6d494e0 100644 --- a/arch/mips/philips/pnx8550/common/time.c +++ b/arch/mips/philips/pnx8550/common/time.c @@ -22,7 +22,6 @@ #include <linux/kernel_stat.h> #include <linux/spinlock.h> #include <linux/interrupt.h> -#include <linux/module.h> #include <asm/bootinfo.h> #include <asm/cpu.h> @@ -41,11 +40,60 @@ static cycle_t hpt_read(void) return read_c0_count2(); } +static struct clocksource pnx_clocksource = { + .name = "pnx8xxx", + .rating = 200, + .read = hpt_read, + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + static void timer_ack(void) { write_c0_compare(cpj); } +static irqreturn_t pnx8xxx_timer_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *c = dev_id; + + /* clear MATCH, signal the event */ + c->event_handler(c); + + return IRQ_HANDLED; +} + +static struct irqaction pnx8xxx_timer_irq = { + .handler = pnx8xxx_timer_interrupt, + .flags = IRQF_DISABLED | IRQF_PERCPU, + .name = "pnx8xxx_timer", +}; + +static irqreturn_t monotonic_interrupt(int irq, void *dev_id) +{ + /* Timer 2 clear interrupt */ + write_c0_compare2(-1); + return IRQ_HANDLED; +} + +static struct irqaction monotonic_irqaction = { + .handler = monotonic_interrupt, + .flags = IRQF_DISABLED, + .name = "Monotonic timer", +}; + +static int pnx8xxx_set_next_event(unsigned long delta, + struct clock_event_device *evt) +{ + write_c0_compare(delta); + return 0; +} + +static struct clock_event_device pnx8xxx_clockevent = { + .name = "pnx8xxx_clockevent", + .features = CLOCK_EVT_FEAT_ONESHOT, + .set_next_event = pnx8xxx_set_next_event, +}; + /* * plat_time_init() - it does the following things: * @@ -58,11 +106,34 @@ static void timer_ack(void) __init void plat_time_init(void) { + unsigned int configPR; unsigned int n; unsigned int m; unsigned int p; unsigned int pow2p; + clockevents_register_device(&pnx8xxx_clockevent); + clocksource_register(&pnx_clocksource); + + setup_irq(PNX8550_INT_TIMER1, &pnx8xxx_timer_irq); + setup_irq(PNX8550_INT_TIMER2, &monotonic_irqaction); + + /* Timer 1 start */ + configPR = read_c0_config7(); + configPR &= ~0x00000008; + write_c0_config7(configPR); + + /* Timer 2 start */ + configPR = read_c0_config7(); + configPR &= ~0x00000010; + write_c0_config7(configPR); + + /* Timer 3 stop */ + configPR = read_c0_config7(); + configPR |= 0x00000020; + write_c0_config7(configPR); + + /* PLL0 sets MIPS clock (PLL1 <=> TM1, PLL6 <=> TM2, PLL5 <=> mem) */ /* (but only if CLK_MIPS_CTL select value [bits 3:1] is 1: FIXME) */ @@ -87,42 +158,6 @@ __init void plat_time_init(void) write_c0_count2(0); write_c0_compare2(0xffffffff); - clocksource_mips.read = hpt_read; - mips_timer_ack = timer_ack; -} - -static irqreturn_t monotonic_interrupt(int irq, void *dev_id) -{ - /* Timer 2 clear interrupt */ - write_c0_compare2(-1); - return IRQ_HANDLED; } -static struct irqaction monotonic_irqaction = { - .handler = monotonic_interrupt, - .flags = IRQF_DISABLED, - .name = "Monotonic timer", -}; -void __init plat_timer_setup(struct irqaction *irq) -{ - int configPR; - - setup_irq(PNX8550_INT_TIMER1, irq); - setup_irq(PNX8550_INT_TIMER2, &monotonic_irqaction); - - /* Timer 1 start */ - configPR = read_c0_config7(); - configPR &= ~0x00000008; - write_c0_config7(configPR); - - /* Timer 2 start */ - configPR = read_c0_config7(); - configPR &= ~0x00000010; - write_c0_config7(configPR); - - /* Timer 3 stop */ - configPR = read_c0_config7(); - configPR |= 0x00000020; - write_c0_config7(configPR); -} |