diff options
author | Sujith Manoharan <c_manoha@qca.qualcomm.com> | 2013-08-27 06:04:39 (GMT) |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2013-08-28 17:58:27 (GMT) |
commit | 27251e0087598befb39599eb3dd2a3c59bce2fb9 (patch) | |
tree | 8949eae65053acb3446fd0609f012a0b70ca418f | |
parent | 65c1a4de59b0d417d68c04d5ee033058a9e7a83a (diff) | |
download | linux-fsl-qoriq-27251e0087598befb39599eb3dd2a3c59bce2fb9.tar.xz |
ath9k: Enable D3/L1 ASPM fix for AR9462
AR9462 requires this HW fix for ASPM to work properly.
Also, since WARegVal is used only for the AR8003 family,
use AR_SREV_9300_20_OR_LATER.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index ec47c50..ecc6ec4 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c @@ -574,18 +574,17 @@ static int __ath9k_hw_init(struct ath_hw *ah) * We need to do this to avoid RMW of this register. We cannot * read the reg when chip is asleep. */ - ah->WARegVal = REG_READ(ah, AR_WA); - ah->WARegVal |= (AR_WA_D3_L1_DISABLE | - AR_WA_ASPM_TIMER_BASED_DISABLE); + if (AR_SREV_9300_20_OR_LATER(ah)) { + ah->WARegVal = REG_READ(ah, AR_WA); + ah->WARegVal |= (AR_WA_D3_L1_DISABLE | + AR_WA_ASPM_TIMER_BASED_DISABLE); + } if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) { ath_err(common, "Couldn't reset chip\n"); return -EIO; } - if (AR_SREV_9462(ah)) - ah->WARegVal &= ~AR_WA_D3_L1_DISABLE; - if (AR_SREV_9565(ah)) { ah->WARegVal |= AR_WA_BIT22; REG_WRITE(ah, AR_WA, ah->WARegVal); |