diff options
| author | Jingchang Lu <b35083@freescale.com> | 2013-11-07 06:23:27 (GMT) |
|---|---|---|
| committer | Matthew Weigel <Matthew.Weigel@freescale.com> | 2014-12-11 18:35:35 (GMT) |
| commit | 379180c60d82f73177a531323ff3ead32956a88c (patch) | |
| tree | ec6f8a2613511b46fd2da35b21d0fc08a6fd1283 | |
| parent | 2eeeeda42104eec74cd1dc40f4d4da3442994614 (diff) | |
| download | linux-fsl-qoriq-379180c60d82f73177a531323ff3ead32956a88c.tar.xz | |
ARM: imx: Add Freescale LS1021A SMP support
Freescale LS1021A SoC deploys two cortex-A7 processors,
this adds bring-up support for the secondary core.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
---
This patch has been sent to upstream for review:
https://patchwork.kernel.org/patch/4464481/
| -rw-r--r-- | arch/arm/mach-imx/common.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-imx/mach-ls1021a.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-imx/platsmp.c | 32 |
3 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 4517fd7..7079ace 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -122,6 +122,7 @@ extern void v7_secondary_startup(void); extern void imx_scu_map_io(void); extern void imx_smp_prepare(void); extern void imx_scu_standby_enable(void); +extern void secondary_startup(void); #else static inline void imx_scu_map_io(void) {} static inline void imx_smp_prepare(void) {} @@ -165,5 +166,6 @@ static inline void imx_init_l2cache(void) {} #endif extern struct smp_operations imx_smp_ops; +extern struct smp_operations ls1021a_smp_ops; #endif diff --git a/arch/arm/mach-imx/mach-ls1021a.c b/arch/arm/mach-imx/mach-ls1021a.c index 2ffc20f..d284cdb 100644 --- a/arch/arm/mach-imx/mach-ls1021a.c +++ b/arch/arm/mach-imx/mach-ls1021a.c @@ -27,6 +27,7 @@ DT_MACHINE_START(LS1021A, "Freescale LS1021A") #ifdef CONFIG_ZONE_DMA .dma_zone_size = SZ_128M, #endif + .smp = smp_ops(ls1021a_smp_ops), .init_machine = ls1021a_init_machine, .dt_compat = ls1021a_dt_compat, .restart = mxc_restart, diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c index 1f24c1f..fd41b8d 100644 --- a/arch/arm/mach-imx/platsmp.c +++ b/arch/arm/mach-imx/platsmp.c @@ -16,6 +16,8 @@ #include <asm/page.h> #include <asm/smp_scu.h> #include <asm/mach/map.h> +#include <linux/of.h> +#include <linux/of_address.h> #include "common.h" #include "hardware.h" @@ -105,3 +107,33 @@ struct smp_operations imx_smp_ops __initdata = { .cpu_kill = imx_cpu_kill, #endif }; + +#define DCFG_CCSR_SCRATCHRW1 0x200 + +static int ls1021a_boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); + + return 0; +} + +static void __init ls1021a_smp_prepare_cpus(unsigned int max_cpus) +{ + struct device_node *np; + void __iomem *dcfg_base; + unsigned long paddr; + + np = of_find_compatible_node(NULL, NULL, "fsl,ls1021a-dcfg"); + dcfg_base = of_iomap(np, 0); + BUG_ON(!dcfg_base); + + paddr = virt_to_phys(secondary_startup); + writel_relaxed(cpu_to_be32(paddr), dcfg_base + DCFG_CCSR_SCRATCHRW1); + + iounmap(dcfg_base); +} + +struct smp_operations ls1021a_smp_ops __initdata = { + .smp_prepare_cpus = ls1021a_smp_prepare_cpus, + .smp_boot_secondary = ls1021a_boot_secondary, +}; |