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authorJoerg Roedel <joerg.roedel@amd.com>2008-11-17 14:09:20 (GMT)
committerJoerg Roedel <joerg.roedel@amd.com>2008-11-18 14:44:31 (GMT)
commit3ce1f93c6d53c3f91c3846cf66b018276c8ac2e7 (patch)
treeb6dd5e06c031f03aa7c81da818e90c52569707f9
parente5e1f606ecbf67e52ebe2df5d14f8b94ec6544d0 (diff)
downloadlinux-fsl-qoriq-3ce1f93c6d53c3f91c3846cf66b018276c8ac2e7.tar.xz
AMD IOMMU: enable device isolation per default
Impact: makes device isolation the default for AMD IOMMU Some device drivers showed double-free bugs of DMA memory while testing them with AMD IOMMU. If all devices share the same protection domain this can lead to data corruption and data loss. Prevent this by putting each device into its own protection domain per default. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
-rw-r--r--Documentation/kernel-parameters.txt2
-rw-r--r--arch/x86/kernel/amd_iommu_init.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index b56ee02..f2e1e7f 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -294,7 +294,7 @@ and is between 256 and 4096 characters. It is defined in the file
Possible values are:
isolate - enable device isolation (each device, as far
as possible, will get its own protection
- domain)
+ domain) [default]
share - put every device behind one IOMMU into the
same protection domain
fullflush - enable flushing of IO/TLB entries when
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index 838a2e1..595edd2 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -121,7 +121,7 @@ u16 amd_iommu_last_bdf; /* largest PCI device id we have
LIST_HEAD(amd_iommu_unity_map); /* a list of required unity mappings
we find in ACPI */
unsigned amd_iommu_aperture_order = 26; /* size of aperture in power of 2 */
-int amd_iommu_isolate; /* if 1, device isolation is enabled */
+int amd_iommu_isolate = 1; /* if 1, device isolation is enabled */
bool amd_iommu_unmap_flush; /* if true, flush on every unmap */
LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the