diff options
| author | Wang Dongsheng <dongsheng.wang@freescale.com> | 2014-01-06 05:23:30 (GMT) |
|---|---|---|
| committer | Jose Rivera <German.Rivera@freescale.com> | 2014-03-28 13:47:29 (GMT) |
| commit | 3efc8d30ebd3f5138d5940dbc6bbc75e6bceed52 (patch) | |
| tree | fac47791277b83512760315de7e02def562efe8c | |
| parent | 5dd14f536187ffd05f0dbef85dcbcc27348d189e (diff) | |
| download | linux-fsl-qoriq-3efc8d30ebd3f5138d5940dbc6bbc75e6bceed52.tar.xz | |
powerpc/mpic_timer: fix the time is not accurate caused by GTCRR toggle bit
When the timer GTCCR toggle bit is inverted, we calculated the rest
of the time is not accurate. So we need to ignore this bit.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Change-Id: I6b5228af46a31184b50b8feb7f5da64858fdc054
Reviewed-on: http://git.am.freescale.net:8181/10340
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
| -rw-r--r-- | arch/powerpc/sysdev/mpic_timer.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/sysdev/mpic_timer.c b/arch/powerpc/sysdev/mpic_timer.c index 22d7d57..70dcf9c 100644 --- a/arch/powerpc/sysdev/mpic_timer.c +++ b/arch/powerpc/sysdev/mpic_timer.c @@ -41,6 +41,7 @@ #define MPIC_TIMER_TCR_ROVR_OFFSET 24 #define TIMER_STOP 0x80000000 +#define GTCCR_TOG 0x80000000 #define TIMERS_PER_GROUP 4 #define MAX_TICKS (~0U >> 1) #define MAX_TICKS_CASCADE (~0U) @@ -327,11 +328,13 @@ void mpic_get_remain_time(struct mpic_timer *handle, struct timeval *time) casc_priv = priv->timer[handle->num].cascade_handle; if (casc_priv) { tmp_ticks = in_be32(&priv->regs[handle->num].gtccr); + tmp_ticks &= ~GTCCR_TOG; ticks = ((u64)tmp_ticks & UINT_MAX) * (u64)MAX_TICKS_CASCADE; tmp_ticks = in_be32(&priv->regs[handle->num - 1].gtccr); ticks += tmp_ticks; } else { ticks = in_be32(&priv->regs[handle->num].gtccr); + ticks &= ~GTCCR_TOG; } convert_ticks_to_time(priv, ticks, time); |