diff options
| author | Sergei Shtylyov <sshtylyov@ru.mvista.com> | 2007-02-05 16:45:38 (GMT) |
|---|---|---|
| committer | Jeff Garzik <jeff@garzik.org> | 2007-02-09 22:39:39 (GMT) |
| commit | 409ba47c297fd13849909adea63f183f55d52418 (patch) | |
| tree | 033a0705142e06acd4c6f3bca703cf304d61f726 | |
| parent | 49554c19569c91d0943b67ca731c9abfc857883f (diff) | |
| download | linux-fsl-qoriq-409ba47c297fd13849909adea63f183f55d52418.tar.xz | |
(2.6.20) pata_oldpiix: fix PIO2 underclocking
Fix the PIO mode 2 using mode 0 timings -- this driver should enable the
fast timing bank starting with PIO2, just like the ata_piix driver does.
Also, fix/rephrase some comments while at it.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
| -rw-r--r-- | drivers/ata/pata_oldpiix.c | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/drivers/ata/pata_oldpiix.c b/drivers/ata/pata_oldpiix.c index b76d2b4..45215aa 100644 --- a/drivers/ata/pata_oldpiix.c +++ b/drivers/ata/pata_oldpiix.c @@ -25,7 +25,7 @@ #include <linux/ata.h> #define DRV_NAME "pata_oldpiix" -#define DRV_VERSION "0.5.2" +#define DRV_VERSION "0.5.3" /** * oldpiix_pre_reset - probe begin @@ -94,19 +94,21 @@ static void oldpiix_set_piomode (struct ata_port *ap, struct ata_device *adev) { 2, 1 }, { 2, 3 }, }; - if (pio > 2) - control |= 1; /* TIME1 enable */ + if (pio > 1) + control |= 1; /* TIME */ if (ata_pio_need_iordy(adev)) - control |= 2; /* IE IORDY */ + control |= 2; /* IE */ - /* Intel specifies that the PPE functionality is for disk only */ + /* Intel specifies that the prefetch/posting is for disk only */ if (adev->class == ATA_DEV_ATA) - control |= 4; /* PPE enable */ + control |= 4; /* PPE */ pci_read_config_word(dev, idetm_port, &idetm_data); - /* Enable PPE, IE and TIME as appropriate. Clear the other - drive timing bits */ + /* + * Set PPE, IE and TIME as appropriate. + * Clear the other drive's timing bits. + */ if (adev->devno == 0) { idetm_data &= 0xCCE0; idetm_data |= control; |