diff options
| author | Rahul Sharma <rahul.sharma@samsung.com> | 2013-08-29 05:37:08 (GMT) |
|---|---|---|
| committer | Mike Turquette <mturquette@linaro.org> | 2013-08-30 00:48:06 (GMT) |
| commit | 4625f1b5d44c7f38801c0553fa90b33577307843 (patch) | |
| tree | b4fc25f87f7d566b827d1d32529d97cef5872f7c | |
| parent | 14d87cda8dc6d35b2a6cbbc1e1a5f6df4d9645ae (diff) | |
| download | linux-fsl-qoriq-4625f1b5d44c7f38801c0553fa90b33577307843.tar.xz | |
clk/exynos5420: add hdmi mux to change parents in hdmi driver
hdmi driver needs to change the parent of hdmi clock
to pixel clock or hdmiphy clock, based on the stability
of hdmiphy. This patch is exposing the mux for changing
the parent.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
| -rw-r--r-- | Documentation/devicetree/bindings/clock/exynos5420-clock.txt | 5 | ||||
| -rw-r--r-- | drivers/clk/samsung/clk-exynos5420.c | 5 |
2 files changed, 9 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt index 5758a69..343430b 100644 --- a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt @@ -182,6 +182,11 @@ clock which they consume. g3d 501 smmu_mixer 502 + Mux ID + ---------------------------- + + mout_hdmi 640 + Example 1: An example of a clock controller node is listed below. clock: clock-controller@0x10010000 { diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 522c033..78465a5 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -140,6 +140,9 @@ enum exynos5420_clks { aclk333_g2d = 480, g2d, aclk333_432_gscl = 490, smmu_3aa, smmu_fimcl0, smmu_fimcl1, smmu_fimcl3, fimc_lite3, aclk_g3d = 500, g3d, smmu_mixer, + /* mux clocks */ + mout_hdmi = 640, + nr_clks, }; @@ -400,7 +403,7 @@ static struct samsung_mux_clock exynos5420_mux_clks[] __initdata = { MUX(none, "mout_mipi1", group2_p, SRC_DISP10, 16, 3), MUX(none, "mout_dp1", group2_p, SRC_DISP10, 20, 3), MUX(none, "mout_pixel", group2_p, SRC_DISP10, 24, 3), - MUX(none, "mout_hdmi", hdmi_p, SRC_DISP10, 28, 1), + MUX(mout_hdmi, "mout_hdmi", hdmi_p, SRC_DISP10, 28, 1), /* MAU Block */ MUX(none, "mout_maudio0", maudio0_p, SRC_MAU, 28, 3), |