diff options
author | Dave Airlie <airlied@linux.ie> | 2007-11-05 00:45:27 (GMT) |
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committer | Dave Airlie <airlied@linux.ie> | 2007-11-05 00:49:04 (GMT) |
commit | 7fc86860cf73e060ab8ed9763010dfe5b5389b1c (patch) | |
tree | ccff8d34a2307779d96320158c607ddbd56a2647 | |
parent | 5da0c7aad6271dd29526e3b49cbeb3bab9e8e491 (diff) | |
download | linux-fsl-qoriq-7fc86860cf73e060ab8ed9763010dfe5b5389b1c.tar.xz |
radeon: set the address to access the GART table on the CPU side correctly
This code relied on the CPU and GPU address for the aperture being the same,
On some r5xx hardware I was playing with I noticed that this isn't always true.
This fixes issues seen on some r400 cards. (bugs.freedesktop.org 9957)
Signed-off-by: Dave Airlie <airlied@redhat.com>
-rw-r--r-- | drivers/char/drm/radeon_cp.c | 5 | ||||
-rw-r--r-- | drivers/char/drm/radeon_drv.h | 1 |
2 files changed, 4 insertions, 2 deletions
diff --git a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c index 335423c..24fca8e 100644 --- a/drivers/char/drm/radeon_cp.c +++ b/drivers/char/drm/radeon_cp.c @@ -1679,7 +1679,7 @@ static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init) dev_priv->gart_info.bus_addr = dev_priv->pcigart_offset + dev_priv->fb_location; dev_priv->gart_info.mapping.offset = - dev_priv->gart_info.bus_addr; + dev_priv->pcigart_offset + dev_priv->fb_aper_offset; dev_priv->gart_info.mapping.size = dev_priv->gart_info.table_size; @@ -2275,7 +2275,8 @@ int radeon_driver_firstopen(struct drm_device *dev) if (ret != 0) return ret; - ret = drm_addmap(dev, drm_get_resource_start(dev, 0), + dev_priv->fb_aper_offset = drm_get_resource_start(dev, 0); + ret = drm_addmap(dev, dev_priv->fb_aper_offset, drm_get_resource_len(dev, 0), _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING, &map); if (ret != 0) diff --git a/drivers/char/drm/radeon_drv.h b/drivers/char/drm/radeon_drv.h index e4077bc..bfbb60a 100644 --- a/drivers/char/drm/radeon_drv.h +++ b/drivers/char/drm/radeon_drv.h @@ -293,6 +293,7 @@ typedef struct drm_radeon_private { /* starting from here on, data is preserved accross an open */ uint32_t flags; /* see radeon_chip_flags */ + unsigned long fb_aper_offset; } drm_radeon_private_t; typedef struct drm_radeon_buf_priv { |