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authorVarun Sethi <Varun.Sethi@freescale.com>2013-05-03 20:08:50 (GMT)
committerFleming Andrew-AFLEMING <AFLEMING@freescale.com>2013-05-07 21:32:51 (GMT)
commita0c1ad437f79ce8833333cbc422c884db9707bf0 (patch)
tree6a00c4c100314ad9d1acfcfa342705f331b44212
parentd20686edbd934e76bab1787ca584691fbd1354c7 (diff)
downloadlinux-fsl-qoriq-a0c1ad437f79ce8833333cbc422c884db9707bf0.tar.xz
Check of qemu emulated PCI controller.
While implementing direct device assignment for linux guest using identity mapped memory (1:1 guest to host physical mapping), we hit a case where guest end of memory is not a power of two and thus is not completely mapped by the PCI controller inbound window. For a similar condition if the PCI controller supports PCI express capability the fsl_pci driver allows for over commit of inbound memory window. In this patch we introduce a check to see if the PCI controller is a qemu emulated controller. If it's an emulated controller we allow the inbound memory over commit in the fsl_pci driver. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Change-Id: I6dd7e5fb960a2ec068dd4f01c51906a7a1dea1f7 Reviewed-on: http://git.am.freescale.net:8181/2357 Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
-rw-r--r--arch/powerpc/platforms/85xx/qemu_e500.c13
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c2
-rw-r--r--arch/powerpc/sysdev/fsl_pci.h2
3 files changed, 16 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/85xx/qemu_e500.c b/arch/powerpc/platforms/85xx/qemu_e500.c
index 5cefc5a..4677463 100644
--- a/arch/powerpc/platforms/85xx/qemu_e500.c
+++ b/arch/powerpc/platforms/85xx/qemu_e500.c
@@ -26,6 +26,17 @@
#include "smp.h"
#include "mpc85xx.h"
+/*
+ * Flag to indicate a qemu emulated PCI controller.
+ * This flag would be checked in the fsl PCI controller
+ * driver code, while setting the inbound windows. In
+ * case of identity mapped memory (1:1 guest physical to
+ * host physical) this would allow the inbound window
+ * to map till end of DDR memory, in case the address
+ * is not power of 2 aligned.
+ */
+unsigned int qemu_e500_pci;
+
void __init qemu_e500_pic_init(void)
{
struct mpic *mpic;
@@ -45,6 +56,8 @@ static void __init qemu_e500_setup_arch(void)
fsl_pci_assign_primary();
swiotlb_detect_4g();
mpc85xx_smp_init();
+
+ qemu_e500_pci = 1;
}
/*
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 362e370..f2da1a1 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -325,7 +325,7 @@ static void setup_pci_atmu(struct pci_controller *hose)
mem_log = __ilog2_u64(sz);
/* PCIe can overmap inbound & outbound since RX & TX are separated */
- if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) {
+ if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP) || qemu_e500_pci) {
/* Size window to exact size if power-of-two or one size up */
if ((1ull << mem_log) != mem) {
if ((1ull << mem_log) > mem)
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h
index a288369..c95738b 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -150,6 +150,8 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose);
extern struct device_node *fsl_pci_primary;
+extern unsigned int qemu_e500_pci;
+
#ifdef CONFIG_PCI
void fsl_pci_assign_primary(void);
#else