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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2012-10-31 20:12:45 (GMT)
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-11-11 22:51:22 (GMT)
commita35f267946947b3798827a783d82d3d2aa55697d (patch)
tree059914c16cd764a99ddcc7d1df7589946e0252a0
parent25e78e90f33a783e8129e29c1a567a63300ca8ce (diff)
downloadlinux-fsl-qoriq-a35f267946947b3798827a783d82d3d2aa55697d.tar.xz
drm/i915: remove IBX code from lpt_enable_pch_transcoder
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/intel_display.c15
1 files changed, 1 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 9c5783c..2de9a6e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1744,22 +1744,9 @@ static void lpt_enable_pch_transcoder(struct drm_i915_private *dev_priv,
val = I915_READ(reg);
pipeconf_val = I915_READ(PIPECONF(pipe));
- if (HAS_PCH_IBX(dev_priv->dev)) {
- /*
- * make the BPC in transcoder be consistent with
- * that in pipeconf reg.
- */
- val &= ~PIPE_BPC_MASK;
- val |= pipeconf_val & PIPE_BPC_MASK;
- }
-
val &= ~TRANS_INTERLACE_MASK;
if ((pipeconf_val & PIPECONF_INTERLACE_MASK) == PIPECONF_INTERLACED_ILK)
- if (HAS_PCH_IBX(dev_priv->dev) &&
- intel_pipe_has_type(crtc, INTEL_OUTPUT_SDVO))
- val |= TRANS_LEGACY_INTERLACED_ILK;
- else
- val |= TRANS_INTERLACED;
+ val |= TRANS_INTERLACED;
else
val |= TRANS_PROGRESSIVE;