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| author | Eugeni Dodonov <eugeni.dodonov@intel.com> | 2012-03-29 15:32:27 (GMT) |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-04-09 16:04:01 (GMT) |
| commit | bb879a44ffd5f708be14b1578239e51b2a4555e8 (patch) | |
| tree | 886f8764f696a12ce6a234063e5c282269ed49e6 | |
| parent | 03f896a1aeff5bd7f47b6d24562af9fc671f30ed (diff) | |
| download | linux-fsl-qoriq-bb879a44ffd5f708be14b1578239e51b2a4555e8.tar.xz | |
drm/i915: add definition of DDI buffer translations regs
Those registers are used to train DDI buffer translations for each link
type.
v2: access each port registers through the DDI_BUF_TRANS macro
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index bcc76ce..a87f41c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4109,4 +4109,11 @@ #define DDI_PORT_WIDTH_X4 (3<<1) #define DDI_INIT_DISPLAY_DETECTED (1<<0) +/* DDI Buffer Translations */ +#define DDI_BUF_TRANS_A 0x64E00 +#define DDI_BUF_TRANS_B 0x64E60 +#define DDI_BUF_TRANS(port) _PORT(port, \ + DDI_BUF_TRANS_A, \ + DDI_BUF_TRANS_B) + #endif /* _I915_REG_H_ */ |