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authorMattias Nilsson <mattias.i.nilsson@stericsson.com>2011-08-12 08:27:50 (GMT)
committerSamuel Ortiz <sameo@linux.intel.com>2011-10-24 12:09:18 (GMT)
commitd65e12d70436cfb2728a78aec3f7bc1cd79eaa34 (patch)
tree1420e6831dc051fb9cc275c1e0499ad6304f1feb
parenta592c2e20fe2ba696cc7cd16d02abec8ac16ea41 (diff)
downloadlinux-fsl-qoriq-d65e12d70436cfb2728a78aec3f7bc1cd79eaa34.tar.xz
mfd: Initialize DB8500 PRCMU regs
Some clocks may be force enabled when we probe the driver, but they need to be turned off by default so we have a known state. We call this the register initialization function if we need more stuff in there in the future. Signed-off-by: Mattias Nilsson <mattias.i.nilsson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
-rw-r--r--drivers/mfd/db8500-prcmu.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index dcc690e..e2c4a26 100644
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -1840,6 +1840,16 @@ void __init prcmu_early_init(void)
}
}
+static void __init init_prcm_registers(void)
+{
+ u32 val;
+
+ val = readl(PRCM_A9PL_FORCE_CLKEN);
+ val &= ~(PRCM_A9PL_FORCE_CLKEN_PRCM_A9PL_FORCE_CLKEN |
+ PRCM_A9PL_FORCE_CLKEN_PRCM_A9AXI_FORCE_CLKEN);
+ writel(val, (PRCM_A9PL_FORCE_CLKEN));
+}
+
/*
* Power domain switches (ePODs) modeled as regulators for the DB8500 SoC
*/
@@ -2038,6 +2048,8 @@ static int __init db8500_prcmu_probe(struct platform_device *pdev)
if (ux500_is_svp())
return -ENODEV;
+ init_prcm_registers();
+
/* Clean up the mailbox interrupts after pre-kernel code. */
writel(ALL_MBOX_BITS, PRCM_ARM_IT1_CLR);