Revert "powerpc/mpc85xx/e6500: work around CPU erratum A-006198"

This reverts commit f4c0e693ccc3422c5b809e7cc8f59b7637e3b7ab.

rev1 is no longer supported in the SDK, and the workaround for A-006198
conflicts with machine check support.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Change-Id: I64e1ce19eb59a6bba8649156597cc49ff9b62b1e
Reviewed-on: http://git.am.freescale.net:8181/10271
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Kim Phillips <Kim.Phillips@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>

9 files changed, 32 insertions, 125 deletions

diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
index 39d335b..10be1dd 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -89,31 +89,7 @@ static inline bool arch_irqs_disabled(void)
 
 #ifdef CONFIG_PPC_BOOK3E
 #define __hard_irq_enable()	asm volatile("wrteei 1" : : : "memory")
-
-#ifdef CONFIG_FSL_ERRATUM_A_006198
-static inline void __hard_irq_disable(void)
-{
-	void fsl_erratum_a006198_return(void);
-	unsigned long tmp;
-
-	asm volatile("bl 2f;"
-		     "2: mflr %0;"
-		     "addi %0, %0, 1f-2b;"
-		     "mtlr %0;"
-		     "mtspr %1, %4;"
-		     "mfmsr %0;"
-		     "rlwinm %0, %0, 0, ~%3;"
-		     "mtspr %2, %0;"
-		     "rfmci;"
-		     "1: mtmsr %0" : "=&r" (tmp) :
-		     "i" (SPRN_MCSRR0), "i" (SPRN_MCSRR1),
-		     "i" (MSR_EE), "r" (*(u64 *)fsl_erratum_a006198_return) :
-		     "memory", "lr");
-}
-#else
 #define __hard_irq_disable()	asm volatile("wrteei 0" : : : "memory")
-#endif
-
 #else
 #define __hard_irq_enable()	__mtmsrd(local_paca->kernel_msr | MSR_EE, 1)
 #define __hard_irq_disable()	__mtmsrd(local_paca->kernel_msr, 1)
@@ -157,8 +133,6 @@ extern bool prep_irq_for_idle(void);
 
 #define SET_MSR_EE(x)	mtmsr(x)
 
-#define __hard_irq_disable()	asm volatile("wrteei 0" : : : "memory")
-
 static inline unsigned long arch_local_save_flags(void)
 {
 	return mfmsr();
@@ -167,24 +141,7 @@ static inline unsigned long arch_local_save_flags(void)
 static inline void arch_local_irq_restore(unsigned long flags)
 {
 #if defined(CONFIG_BOOKE)
-#ifdef CONFIG_FSL_ERRATUM_A_006198
-	void fsl_erratum_a006198_return(void);
-	unsigned long tmp;
-
-	asm volatile("bl 2f;"
-		     "2: mflr %0;"
-		     "addi %0, %0, 1f-2b;"
-		     "mtlr %0;"
-		     "mtspr %1, %3;"
-		     "mtspr %2, %4;"
-		     "rfmci;"
-		     "1: mtmsr %3" : "=&r" (tmp) :
-		     "i" (SPRN_MCSRR1), "i" (SPRN_MCSRR0),
-		     "r" (flags), "r" (*(u64 *)fsl_erratum_a006198_return) :
-		     "memory", "lr");
-#else
 	asm volatile("wrtee %0" : : "r" (flags) : "memory");
-#endif
 #else
 	mtmsr(flags);
 #endif
@@ -194,7 +151,7 @@ static inline unsigned long arch_local_irq_save(void)
 {
 	unsigned long flags = arch_local_save_flags();
 #ifdef CONFIG_BOOKE
-	__hard_irq_disable();
+	asm volatile("wrteei 0" : : : "memory");
 #else
 	SET_MSR_EE(flags & ~MSR_EE);
 #endif
@@ -204,7 +161,7 @@ static inline unsigned long arch_local_irq_save(void)
 static inline void arch_local_irq_disable(void)
 {
 #ifdef CONFIG_BOOKE
-	__hard_irq_disable();
+	asm volatile("wrteei 0" : : : "memory");
 #else
 	arch_local_irq_save();
 #endif
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index e2f9a7a..f595b98 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -755,49 +755,6 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,945)
 #define N_SLINE	68
 #define N_SO	100
 
-.macro fsl_erratum_a006198_mtmsr newmsr scratch1 scratch2
-#ifdef CONFIG_FSL_ERRATUM_A_006198
-	mflr	\scratch2
-	LOAD_REG_IMMEDIATE(\scratch1, 237f)
-	mtlr	\scratch1
-	LOAD_REG_IMMEDIATE(\scratch1, .fsl_erratum_a006198_return)
-	mtspr	SPRN_MCSRR1, \newmsr
-	mtspr	SPRN_MCSRR0, \scratch1
-	rfmci
-237:	mtmsr	\newmsr
-	mtlr	\scratch2
-#else
-	mtmsr	\newmsr
-#endif
-.endm
-
-.macro fsl_erratum_a006198_wrteei0 scratch1 scratch2
-#ifdef CONFIG_FSL_ERRATUM_A_006198
-	mflr	\scratch2
-	LOAD_REG_IMMEDIATE(\scratch1, 237f)
-	mtlr	\scratch1
-	LOAD_REG_IMMEDIATE(\scratch1, .fsl_erratum_a006198_return)
-	mtspr	SPRN_MCSRR0, \scratch1
-	mfmsr	\scratch1
-	rlwinm	\scratch1, \scratch1, 0, ~MSR_EE
-	mtspr	SPRN_MCSRR1, \scratch1
-	rfmci
-237:	mtmsr	\scratch1
-	mtlr	\scratch2
-#else
-	wrteei	0
-#endif
-.endm
-
-.macro fsl_erratum_a006198_restore_srr scratch
-#ifdef CONFIG_FSL_ERRATUM_A_006198
-	LOAD_REG_IMMEDIATE(\scratch, .fsl_erratum_a006198_return)
-	mtspr	SPRN_MCSRR0, \scratch
-	lis	\scratch, MSR_CM@h
-	mtspr	SPRN_MCSRR1, \scratch
-#endif
-.endm
-
 /*
  * Create an endian fixup trampoline
  *
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index f6082ba..bbfb029 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -197,7 +197,7 @@ syscall_exit:
 	 * and so that we don't get interrupted after loading SRR0/1.
 	 */
 #ifdef CONFIG_PPC_BOOK3E
-	fsl_erratum_a006198_wrteei0 r10 r9
+	wrteei	0
 #else
 	ld	r10,PACAKMSR(r13)
 	/*
@@ -621,7 +621,7 @@ _GLOBAL(ret_from_except_lite)
 	 * from the interrupt.
 	 */
 #ifdef CONFIG_PPC_BOOK3E
-	fsl_erratum_a006198_wrteei0 r10 r9
+	wrteei	0
 #else
 	ld	r10,PACAKMSR(r13) /* Get kernel MSR without EE */
 	mtmsrd	r10,1		  /* Update machine state */
@@ -737,7 +737,7 @@ resume_kernel:
 	 * interrupted after loading SRR0/1.
 	 */
 #ifdef CONFIG_PPC_BOOK3E
-	fsl_erratum_a006198_wrteei0 r10 r5
+	wrteei	0
 #else
 	ld	r10,PACAKMSR(r13) /* Get kernel MSR without EE */
 	mtmsrd	r10,1		  /* Update machine state */
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 8aeaa01..c963141 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -945,7 +945,6 @@ kernel_dbg_exc:
 	mtcr	r11
 	ld	r10,PACA_EXGEN+EX_R10(r13)
 	ld	r11,PACA_EXGEN+EX_R11(r13)
-	fsl_erratum_a006198_restore_srr r13
 	mfspr	r13,SPRN_SPRG_GEN_SCRATCH
 	rfi
 	b	.
@@ -1050,7 +1049,7 @@ _GLOBAL(exception_return_book3e)
  */
 	.globl fast_exception_return
 fast_exception_return:
-	fsl_erratum_a006198_wrteei0 r0 r10
+	wrteei	0
 1:	mr	r0,r13
 	ld	r10,_MSR(r1)
 	REST_4GPRS(2, r1)
@@ -1086,7 +1085,6 @@ fast_exception_return:
 	mtspr	SPRN_SRR1,r11
 	ld	r10,PACA_EXGEN+EX_R10(r13)
 	ld	r11,PACA_EXGEN+EX_R11(r13)
-	fsl_erratum_a006198_restore_srr r13
 	mfspr	r13,SPRN_SPRG_GEN_SCRATCH
 	rfi
 
@@ -1645,7 +1643,7 @@ _STATIC(init_thread_book3e)
 	mtspr	SPRN_EPCR,r3
 
 	/* Make sure interrupts are off */
-	fsl_erratum_a006198_wrteei0 r3 r4
+	wrteei	0
 
 	/* disable all timers and clear out status */
 	li	r3,0
diff --git a/arch/powerpc/kernel/idle_book3e.S b/arch/powerpc/kernel/idle_book3e.S
index ee1f024..bfb73cc 100644
--- a/arch/powerpc/kernel/idle_book3e.S
+++ b/arch/powerpc/kernel/idle_book3e.S
@@ -28,7 +28,7 @@ _GLOBAL(\name)
 	std	r0,16(r1)
 
 	/* Hard disable interrupts */
-	fsl_erratum_a006198_wrteei0 r0 r3
+	wrteei	0
 
 	/* Now check if an interrupt came in while we were soft disabled
 	 * since we may otherwise lose it (doorbells etc...).
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index cfbb214..e59caf8 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -621,6 +621,3 @@ _GLOBAL(kexec_sequence)
 	li	r5,0
 	blr	/* image->start(physid, image->start, 0); */
 #endif /* CONFIG_KEXEC */
-
-_GLOBAL(fsl_erratum_a006198_return)
-	blr
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index f931f70..3bd77ed 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -208,8 +208,3 @@ EXPORT_SYMBOL_GPL(mmu_psize_defs);
 #ifdef CONFIG_EPAPR_PARAVIRT
 EXPORT_SYMBOL(epapr_hypercall_start);
 #endif
-
-#ifdef CONFIG_FSL_ERRATUM_A_006198
-void fsl_erratum_a006198_return(void);
-EXPORT_SYMBOL(fsl_erratum_a006198_return);
-#endif
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
index 71b67ee..c7a5943 100644
--- a/arch/powerpc/mm/tlb_nohash_low.S
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -366,12 +366,12 @@ ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX)
 _GLOBAL(_tlbil_pid)
 	slwi	r4,r3,MAS6_SPID_SHIFT
 	mfmsr	r10
-	fsl_erratum_a006198_wrteei0 r0 r7
+	wrteei	0
 	tlb_lock
 	mtspr	SPRN_MAS6,r4
 	PPC_TLBILX_PID(0,R0)
 	tlb_unlock
-	fsl_erratum_a006198_mtmsr r10 r0 r7
+	wrtee	r10
 	msync
 	isync
 	blr
@@ -380,30 +380,30 @@ _GLOBAL(_tlbil_pid_noind)
 	slwi	r4,r3,MAS6_SPID_SHIFT
 	mfmsr	r10
 	ori	r4,r4,MAS6_SIND
-	fsl_erratum_a006198_wrteei0 r0 r7
+	wrteei	0
 	tlb_lock
 	mtspr	SPRN_MAS6,r4
 	PPC_TLBILX_PID(0,R0)
 	tlb_unlock
-	fsl_erratum_a006198_mtmsr r10 r0 r7
+	wrtee	r10
 	msync
 	isync
 	blr
 
 _GLOBAL(_tlbil_all)
 	mfmsr	r10
-	fsl_erratum_a006198_wrteei0 r0 r7
+	wrteei	0
 	tlb_lock
 	PPC_TLBILX_ALL(0,R0)
 	msync
 	isync
 	tlb_unlock
-	fsl_erratum_a006198_mtmsr r10 r0 r7
+	wrtee	r10
 	blr
 
 _GLOBAL(_tlbil_va)
 	mfmsr	r10
-	fsl_erratum_a006198_wrteei0 r0 r7
+	wrteei	0
 	tlb_lock
 	cmpwi	cr0,r6,0
 	slwi	r4,r4,MAS6_SPID_SHIFT
@@ -415,12 +415,12 @@ _GLOBAL(_tlbil_va)
 	msync
 	isync
 	tlb_unlock
-	fsl_erratum_a006198_mtmsr r10 r0 r7
+	wrtee	r10
 	blr
 
 _GLOBAL(_tlbivax_bcast)
 	mfmsr	r10
-	fsl_erratum_a006198_wrteei0 r0 r7
+	wrteei	0
 	cmpwi	cr0,r6,0
 	slwi	r4,r4,MAS6_SPID_SHIFT
 	rlwimi	r4,r5,MAS6_ISIZE_SHIFT,MAS6_ISIZE_MASK
@@ -431,7 +431,7 @@ _GLOBAL(_tlbivax_bcast)
 	eieio
 	tlbsync
 	sync
-	fsl_erratum_a006198_mtmsr r10 r0 r7
+	wrtee	r10
 	blr
 
 _GLOBAL(set_context)
@@ -458,7 +458,7 @@ _GLOBAL(set_context)
  */
 _GLOBAL(loadcam_entry)
 	mfmsr	r10
-	fsl_erratum_a006198_wrteei0 r0 r7
+	wrteei	0
 	tlb_lock
 
 	LOAD_REG_ADDR(r4, TLBCAM)
@@ -481,6 +481,6 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_BIG_PHYS)
 	isync
 
 	tlb_unlock
-	fsl_erratum_a006198_mtmsr r10 r0 r7
+	wrtee	r10
 	blr
 #endif
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 226f871..fc701e7 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -246,15 +246,18 @@ config FSL_ERRATUM_A_006184_PERIOD
 config PPC_DISABLE_THREADS
 	bool "Avoid the use of hardware threads"
 	help
-	  Define this if running e6500 rev1 to avoid bugs
-	  relating to hardware threads.
-
-config FSL_ERRATUM_A_006198
-	bool "Work around e6500 rev1 erratum A-006198"
-	depends on PPC_E500MC && !PPC_DISABLE_THREADS
-	help
-	  Define this if running e6500 rev1, to avoid a source
-	  of hangs due to CPU erratum A-006198.
+	  Define this to disable hardware threads, so that only one
+	  thread per core will be used.  Do not rely on runtime
+	  mechanisms to disable threads (e.g. kernel command line
+	  options or device tree modifciations), as those will cause the
+	  thread will be spinning rather than fully disabled in hardware.
+
+	  This option is mainly useful for testing, though some workloads
+	  may benefit from not using hardware threads.  This option will
+	  have no effect on hardware that doesn't support multiple
+	  threads per core.
+
+	  If in doubt, say N.
 
 config PPC_FPU
 	bool