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authorAndrew Lunn <andrew@lunn.ch>2012-07-19 06:58:08 (GMT)
committerAndrew Lunn <andrew@lunn.ch>2012-07-25 14:50:45 (GMT)
commitf479db44d2e3d4a969897e1f5e331e5ed4ac4968 (patch)
tree7e9bc90a5f5ef7686dd9dd5ba44209e41d3b1e2b
parent84a1caf1453c3d44050bd22db958af4a7f99315c (diff)
downloadlinux-fsl-qoriq-f479db44d2e3d4a969897e1f5e331e5ed4ac4968.tar.xz
ARM: Kirkwood: Ensure runit clock always ticks.
Marvell engineers tell us: It seems that many units use the RUNIT clock. SPI, UART, NAND, TWSI, ... So it's not possible to clock gate it. Currently the SPI, NAND and TWSI driver will clk_prepaure_enable() this clk, but since we have no idea what ... is, and turning this clk off results in a hard lock, unconditionally enable runit. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Simon Baatz <gmbnomis@gmail.com>
-rw-r--r--arch/arm/mach-kirkwood/common.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index f261cd2..3de2d6d 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -241,6 +241,11 @@ void __init kirkwood_clk_init(void)
orion_clkdev_add("0", "pcie", pex0);
orion_clkdev_add("1", "pcie", pex1);
orion_clkdev_add(NULL, "kirkwood-i2s", audio);
+
+ /* Marvell says runit is used by SPI, UART, NAND, TWSI, ...,
+ * so should never be gated.
+ */
+ clk_prepare_enable(runit);
}
/*****************************************************************************