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authorAlex Deucher <alexander.deucher@amd.com>2012-10-05 14:22:02 (GMT)
committerAlex Deucher <alexander.deucher@amd.com>2012-10-15 17:21:00 (GMT)
commit29dbe3bcd2e28e71823febdca989d63d5c27d152 (patch)
tree167612c387fdc175e2b8aa9d74da30d9a751339e /Documentation/arm/nwfpe
parentcd23492af3d4401c02c48a4bebe5995c9498eac5 (diff)
downloadlinux-fsl-qoriq-29dbe3bcd2e28e71823febdca989d63d5c27d152.tar.xz
drm/radeon: allocate PPLLs from low to high
The order shouldn't matter, but there have been problems reported on certain older asics. This behaves more like the original code before the PPLL allocation rework. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Markus Trippelsdorf <markus@trippelsdorf.de>
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