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authorLinus Walleij <linus.walleij@linaro.org>2012-09-06 08:07:57 (GMT)
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-09-17 22:18:18 (GMT)
commit9bc1503185a09930782012fda5601694caeec77a (patch)
tree12bf2ec9afc1e128ad63ad7b2382a590e4a0781e /Documentation/devicetree/bindings/arm
parent2c88543b953581f70f05bf133a1b8f196c48ef23 (diff)
downloadlinux-fsl-qoriq-9bc1503185a09930782012fda5601694caeec77a.tar.xz
ARM: 7516/1: plat-versatile: add DT support to FPGA IRQ
This adds Device Tree probing support to the Versatile FPGA IRQ controller. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'Documentation/devicetree/bindings/arm')
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diff --git a/Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt b/Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt
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+* ARM Versatile FPGA interrupt controller
+
+One or more FPGA IRQ controllers can be synthesized in an ARM reference board
+such as the Integrator or Versatile family. The output of these different
+controllers are OR:ed together and fed to the CPU tile's IRQ input. Each
+instance can handle up to 32 interrupts.
+
+Required properties:
+- compatible: "arm,versatile-fpga-irq"
+- interrupt-controller: Identifies the node as an interrupt controller
+- #interrupt-cells: The number of cells to define the interrupts. Must be 1
+ as the FPGA IRQ controller has no configuration options for interrupt
+ sources. The cell is a u32 and defines the interrupt number.
+- reg: The register bank for the FPGA interrupt controller.
+- clear-mask: a u32 number representing the mask written to clear all IRQs
+ on the controller at boot for example.
+- valid-mask: a u32 number representing a bit mask determining which of
+ the interrupts are valid. Unconnected/unused lines are set to 0, and
+ the system till not make it possible for devices to request these
+ interrupts.
+
+Example:
+
+pic: pic@14000000 {
+ compatible = "arm,versatile-fpga-irq";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ reg = <0x14000000 0x100>;
+ clear-mask = <0xffffffff>;
+ valid-mask = <0x003fffff>;
+};