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authorDoug Anderson <dianders@chromium.org>2013-03-13 20:40:00 (GMT)
committerJonathan Cameron <jic23@kernel.org>2013-03-17 22:46:55 (GMT)
commitbb916ebbeabd18f7dc3c661275d2c9d343f4fa85 (patch)
treecf0b32107d855fe11b27b8eeab2b5ed38791a8d8 /Documentation/devicetree
parentf2f7a449707eade5d6876d48d48ddc79dd77d75f (diff)
downloadlinux-fsl-qoriq-bb916ebbeabd18f7dc3c661275d2c9d343f4fa85.tar.xz
iio: adc: Add dt support for turning on the phy in exynos-adc
Without this change the exynos adc controller needed to have its phy enabled in some out-of-driver C code. Add support for specifying the phy enable register by listing it in the reg list. Signed-off-by: Doug Anderson <dianders@chromium.org> Tested-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
index f686378..05e9d95 100644
--- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
+++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
@@ -15,7 +15,7 @@ Required properties:
Must be "samsung,exynos-adc-v2" for
future controllers.
- reg: Contains ADC register address range (base address and
- length).
+ length) and the address of the phy enable register.
- interrupts: Contains the interrupt information for the timer. The
format is being dependent on which interrupt controller
the Samsung device uses.
@@ -27,7 +27,7 @@ Example: adding device info in dtsi file
adc: adc@12D10000 {
compatible = "samsung,exynos-adc-v1";
- reg = <0x12D10000 0x100>;
+ reg = <0x12D10000 0x100>, <0x10040718 0x4>;
interrupts = <0 106 0>;
#io-channel-cells = <1>;
io-channel-ranges;