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| author | Xie Xiaobo <r63061@freescale.com> | 2013-03-28 10:10:33 (GMT) |
|---|---|---|
| committer | Fleming Andrew-AFLEMING <AFLEMING@freescale.com> | 2013-04-05 16:09:20 (GMT) |
| commit | 09e7175b97a8e3eb5e917df46d917b2254d8d0f5 (patch) | |
| tree | ae8cca50aa9e24b935e31e4715b2b8d4249ccb92 /Documentation | |
| parent | 3174d42c30dc3f3c77e7caf8bd2b5c9e3fab95b1 (diff) | |
| download | linux-fsl-qoriq-09e7175b97a8e3eb5e917df46d917b2254d8d0f5.tar.xz | |
powerpc/85xx: Adds IEEE1588 node in dts
The new property "fsl,ts-to-buffer" is introduced for
platforms which can get tx time stamp from skb buffer.
Some platforms, like mpc8572ds, can only get tx time stamp from
register, so these platforms have no this property.
Signed-off-by: Tang Yuantian <b29983@freescale.com>
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Change-Id: I4b2c9a7ad0c3a47c2c791ac7193f4ba5dc0c7627
Reviewed-on: http://git.am.freescale.net:8181/867
Reviewed-by: Manoil Claudiu-B08782 <claudiu.manoil@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/net/fsl-tsec-phy.txt | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt index 2c6be03..7d61c7e 100644 --- a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt +++ b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt @@ -92,6 +92,16 @@ Clock Properties: - fsl,tmr-fiper1 Fixed interval period pulse generator. - fsl,tmr-fiper2 Fixed interval period pulse generator. - fsl,max-adj Maximum frequency adjustment in parts per billion. + - fsl,clock-source-select Value type: <u32>, + select 1588 Timer reference clock source. + 0. External high precision timer reference + clock (TSEC_1588_CLK_IN) + 1. eTSEC system clock + 2. eTSEC1 transmit clock + 3. RTC clock input. + - fsl,ts-to-buffer Value type <none>, if present, indicates that TSEC + has ability to write time stamp of the transmitted + frame to memory in the padding. These properties set the operational parameters for the PTP clock. You must choose these carefully for the clock to work right. @@ -127,4 +137,6 @@ Example: fsl,tmr-fiper1 = <0x3B9AC9F6>; fsl,tmr-fiper2 = <0x00018696>; fsl,max-adj = <659999998>; + fsl,clock-source-select = <1>; + fsl,ts-to-buffer; }; |