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authorXiubo Li <Li.Xiubo@freescale.com>2014-09-24 07:27:31 (GMT)
committerMatthew Weigel <Matthew.Weigel@freescale.com>2014-12-11 18:37:50 (GMT)
commit3579676a1a33380e958fd06e5089bc9397759fe0 (patch)
tree1e09142deb45160347298e722ada46e386835bf2 /Documentation
parent53a3bb65a928123d2a001840ecb774408cfc1ce0 (diff)
downloadlinux-fsl-qoriq-3579676a1a33380e958fd06e5089bc9397759fe0.tar.xz
fb: Add DCU framebuffer driver for LS1021A platform
The Display Controller Unit (DCU) module is a system master that fetches graphics stored in internal or external memory and displays them on a TFT LCD panel. A wide range of panel sizes is supported and the timing of the interface signals is highly configurable. Graphics are read directly from memory and then blended in real-time, which allows for dynamic content creation with minimal CPU intervention. The features: (1) Full RGB888 output to TFT LCD panel. (2) For the current LCD panel, WQVGA "480x272" is supported. (3) Blending of each pixel using up to 4 source layers dependent on size of panel. (4) Each graphic layer can be placed with one pixel resolution in either axis. (5) Each graphic layer support RGB565 and RGB888 direct colors without alpha channel and BGRA8888 direct colors with an alpha channel. (6) Each graphic layer support alpha blending with 8-bit resolution. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> The maintainer and many other people all have strong opinions to add DCU driver based the DRM framework. The mails URL: http://lists.infradead.org/pipermail/linux-arm-kernel/2013-September/197863.html The first DRM version of DCU will be send out to the community before 30 November 2014. Change-Id: I9feb7c9b975431a1bb3906eb955dcf6ae09654eb Reviewed-on: http://git.am.freescale.net:8181/19647 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Chao Fu <B44548@freescale.com> Reviewed-by: Huan Wang <alison.wang@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
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+* Freescale Display Control Unit (DCU)
+
+=== For dcu node ===
+Required properties:
+- compatible: Should be one of "fsl,vf610-dcu" and "fsl,ls1021a-dcu".
+- reg: Address and length of the register set for DCU.
+- interrupts: Should contain DCU interrupts.
+- clocks: From common clock binding: handle to DCU clock.
+- clock-names: From common clock binding: Shall be "dcu".
+- display: The phandle to display node.
+
+Optional properties:
+- tcon-controller: The phandle of TCON controller.
+- scfg-controller: The phandle of scfg node.
+
+=== For display sub-node ===
+Required properties:
+- bits-per-pixel: <24> for RGB888.
+
+Required timing node for dispplay sub-node:
+- display-timings: Refer to binding doc display-timing.txt for details.
+
+=== For TCON node ===
+Required properties:
+- compatible: Should be "fsl,tcon".
+- reg: Address and length of the register set for TCON.
+- clocks: From common clock binding: handle to TCON clock.
+- clock-names: From common clock binding: Shall be "tcon".
+
+Examples:
+
+dcu0: dcu@40058000 {
+ compatible = "fsl,vf610-dcu";
+ reg = <0x40058000 0x1200>;
+ interrupts = <0 30 0x04>;
+ clocks = <&clks VF610_CLK_DCU0>;
+ clock-names = "dcu";
+ tcon-controller = <&tcon0>;
+ scfg-controller = <&scfg>;
+ display = <&display>;
+
+ display: display@0 {
+ bits-per-pixel = <24>;
+
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: nl4827hc19 {
+ clock-frequency = <10870000>;
+ hactive = <480>;
+ vactive = <272>;
+ hback-porch = <2>;
+ hfront-porch = <2>;
+ vback-porch = <1>;
+ vfront-porch = <1>;
+ hsync-len = <41>;
+ vsync-len = <2>;
+ hsync-active = <1>;
+ vsync-active = <1>;
+ };
+ };
+ };
+};
+
+tcon0: tcon@4003d000 {
+ compatible = "fsl,vf610-tcon";
+ reg = <0x4003d000 0x1000>;
+ clocks = <&clks VF610_CLK_TCON0>;
+ clock-names = "tcon";
+};