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| author | Huang Shijie <b32955@freescale.com> | 2014-02-24 10:37:41 (GMT) |
|---|---|---|
| committer | Matthew Weigel <Matthew.Weigel@freescale.com> | 2014-12-11 18:37:30 (GMT) |
| commit | 78e5793dbd53dbbbcea92434d9da002435ddcff8 (patch) | |
| tree | 6743bb4e1339056179627784e6ec445e3c35700e /Documentation | |
| parent | 586682455f9d6fe7854baf499b4b9c436716863c (diff) | |
| download | linux-fsl-qoriq-78e5793dbd53dbbbcea92434d9da002435ddcff8.tar.xz | |
Documentation: add the binding file for Freescale QuadSPI driver
This patch adds the binding file for Freescale QuadSPI driver.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
(cherry picked from commit c7a8a11c6bb78f49895d42294a88002ea544922f)
Change-Id: I1af8259f5518ae733eae21f9f21ca13b827adba3
Reviewed-on: http://git.am.freescale.net:8181/20127
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/mtd/fsl-quadspi.txt | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mtd/fsl-quadspi.txt b/Documentation/devicetree/bindings/mtd/fsl-quadspi.txt new file mode 100644 index 0000000..823d134 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/fsl-quadspi.txt @@ -0,0 +1,35 @@ +* Freescale Quad Serial Peripheral Interface(QuadSPI) + +Required properties: + - compatible : Should be "fsl,vf610-qspi" + - reg : the first contains the register location and length, + the second contains the memory mapping address and length + - reg-names: Should contain the reg names "QuadSPI" and "QuadSPI-memory" + - interrupts : Should contain the interrupt for the device + - clocks : The clocks needed by the QuadSPI controller + - clock-names : the name of the clocks + +Optional properties: + - fsl,qspi-has-second-chip: The controller has two buses, bus A and bus B. + Each bus can be connected with two NOR flashes. + Most of the time, each bus only has one NOR flash + connected, this is the default case. + But if there are two NOR flashes connected to the + bus, you should enable this property. + (Please check the board's schematic.) + +Example: + +qspi0: quadspi@40044000 { + compatible = "fsl,vf610-qspi"; + reg = <0x40044000 0x1000>, <0x20000000 0x10000000>; + reg-names = "QuadSPI", "QuadSPI-memory"; + interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks VF610_CLK_QSPI0_EN>, + <&clks VF610_CLK_QSPI0>; + clock-names = "qspi_en", "qspi"; + + flash0: s25fl128s@0 { + .... + }; +}; |