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author | Stuart Yoder <stuart.yoder@freescale.com> | 2013-03-05 22:39:08 (GMT) |
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committer | Emil Medve <Emilian.Medve@Freescale.com> | 2013-03-21 18:42:02 (GMT) |
commit | 9f3952a5fd1796321d210eed846c2a7019f1a759 (patch) | |
tree | 7f3132e060c95f5f6ed6959685d87abce46fc732 /Documentation | |
parent | 4ccbef71a216b76bf04cbb8b84d1d26a8aa40078 (diff) | |
download | linux-fsl-qoriq-9f3952a5fd1796321d210eed846c2a7019f1a759.tar.xz |
powerpc/e6500: Add architecture categories for e6500 cores
-also define a binding for fsl,eref-* properties
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/powerpc/fsl/cpus.txt | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt new file mode 100644 index 0000000..922c30a --- /dev/null +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt @@ -0,0 +1,22 @@ +=================================================================== +Power Architecture CPU Binding +Copyright 2013 Freescale Semiconductor Inc. + +Power Architecture CPUs in Freescale SOCs are represented in device trees as +per the definition in ePAPR. + +In addition to the ePAPR definitions, the properties defined below may be +present on CPU nodes. + +PROPERTIES + + - fsl,eref-* + Usage: optional + Value type: <empty> + Definition: The EREF (EREF: A Programmer.s Reference Manual for + Freescale Power Architecture) defines the architecture for Freescale + Power CPUs. The EREF defines some architecture categories not defined + by the Power ISA. For these EREF-specific categories, the existence of + a property named fsl,eref-[CAT], where [CAT] is the abbreviated category + name with all uppercase letters converted to lowercase, indicates that + the category is supported by the implementation. |