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| author | Arnd Bergmann <arnd@arndb.de> | 2012-07-17 21:13:06 (GMT) |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-07-17 21:13:06 (GMT) |
| commit | 5d74c8a065abc8ae283a6fe8a1e7dd6313a22165 (patch) | |
| tree | d2283bb9617a679ed6e535defb1cfd7176fc23c2 /arch/arm/boot/dts/exynos4210.dtsi | |
| parent | feb7b8d6d2b2eedbca5a55b5dc74d9d967c91151 (diff) | |
| download | linux-fsl-qoriq-5d74c8a065abc8ae283a6fe8a1e7dd6313a22165.tar.xz | |
ARM: EXYNOS: mark the DMA channel binding for SPI as preliminary
Bindings for DMA channels are still under discussion and will
change once this has been resolved. Therefore we mark them
the newly added ones as preliminary. Let's hope nobody starts
relying on them...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/exynos4210.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/exynos4210.dtsi | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 6904d9d..02891fe 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -168,8 +168,8 @@ compatible = "samsung,exynos4210-spi"; reg = <0x13920000 0x100>; interrupts = <0 66 0>; - tx-dma-channel = <&pdma0 7>; - rx-dma-channel = <&pdma0 6>; + tx-dma-channel = <&pdma0 7>; /* preliminary */ + rx-dma-channel = <&pdma0 6>; /* preliminary */ #address-cells = <1>; #size-cells = <0>; }; @@ -178,8 +178,8 @@ compatible = "samsung,exynos4210-spi"; reg = <0x13930000 0x100>; interrupts = <0 67 0>; - tx-dma-channel = <&pdma1 7>; - rx-dma-channel = <&pdma1 6>; + tx-dma-channel = <&pdma1 7>; /* preliminary */ + rx-dma-channel = <&pdma1 6>; /* preliminary */ #address-cells = <1>; #size-cells = <0>; }; @@ -188,8 +188,8 @@ compatible = "samsung,exynos4210-spi"; reg = <0x13940000 0x100>; interrupts = <0 68 0>; - tx-dma-channel = <&pdma0 9>; - rx-dma-channel = <&pdma0 8>; + tx-dma-channel = <&pdma0 9>; /* preliminary */ + rx-dma-channel = <&pdma0 8>; /* preliminary */ #address-cells = <1>; #size-cells = <0>; }; |