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author | Jingchang Lu <jingchang.lu@freescale.com> | 2014-06-26 08:47:34 (GMT) |
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committer | Matthew Weigel <Matthew.Weigel@freescale.com> | 2014-12-11 18:35:33 (GMT) |
commit | 9d7475890589e7131bad4eb5cbd6f482af674821 (patch) | |
tree | 5bb81cf42f44619716f038338dc2fad9525b2bcd /arch/arm/boot/dts/ls1021a-twr.dts | |
parent | f9fb0405c0c38472c687bf2a16b46112041a8e87 (diff) | |
download | linux-fsl-qoriq-9d7475890589e7131bad4eb5cbd6f482af674821.tar.xz |
ARM: dts: Add initial LS1021A TWR board dts support
Signed-off-by: Chen Lu <B46807@freescale.com>
Signed-off-by: Chao Fu <B44548@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
---
This patch has been sent to upstream for review:
https://patchwork.kernel.org/patch/4464461/
Diffstat (limited to 'arch/arm/boot/dts/ls1021a-twr.dts')
-rwxr-xr-x | arch/arm/boot/dts/ls1021a-twr.dts | 178 |
1 files changed, 178 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/ls1021a-twr.dts b/arch/arm/boot/dts/ls1021a-twr.dts new file mode 100755 index 0000000..7adc70b --- /dev/null +++ b/arch/arm/boot/dts/ls1021a-twr.dts @@ -0,0 +1,178 @@ +/* + * Copyright 2013-2014 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +/dts-v1/; +#include "ls1021a.dtsi" + +/ { + model = "LS1021A TWR Board"; +}; + +&dspi1 { + bus-num = <0>; + status = "okay"; + + dspiflash: s25fl064k@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25fl064k"; + spi-max-frequency = <16000000>; + spi-cpol; + spi-cpha; + reg = <0>; + }; +}; + +&duart0 { + status = "okay"; +}; + +&duart1 { + status = "okay"; +}; + +&enet0 { + tbi-handle = <&tbi1>; + phy-handle = <&phy2>; + phy-connection-type = "sgmii"; + status = "ok"; +}; + +&enet1 { + tbi-handle = <&tbi1>; + phy-handle = <&phy0>; + phy-connection-type = "sgmii"; + status = "ok"; +}; + +&enet2 { + phy-handle = <&phy1>; + phy-connection-type = "rgmii-id"; + status = "ok"; +}; + +&i2c0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; +}; + +&ifc { + status = "okay"; + #address-cells = <2>; + #size-cells = <1>; + /* NOR, and CPLD on board */ + ranges = <0x0 0x0 0x0 0x60000000 0x08000000 + 0x2 0x0 0x0 0x7fb00000 0x00000100>; + + nor@0,0 { + compatible = "cfi-flash"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0 0x0 0x8000000>; + bank-width = <2>; + device-width = <1>; + + partition@0 { + /* 128KB for rcw */ + reg = <0x00000000 0x0020000>; + label = "NOR bank0 RCW Image"; + }; + + partition@20000 { + /* 1MB for DTB */ + reg = <0x00020000 0x00100000>; + label = "NOR DTB Image"; + }; + + partition@120000 { + /* 8 MB for Linux Kernel Image */ + reg = <0x00120000 0x00800000>; + label = "NOR Linux Kernel Image"; + }; + + partition@920000 { + /* 56MB for Ramdisk Root File System */ + reg = <0x00920000 0x03600000>; + label = "NOR Ramdisk Root File System Image"; + }; + + partition@3f80000 { + /* 512KB for bank4 u-boot Image */ + reg = <0x03f80000 0x80000>; + label = "NOR bank4 u-boot Image"; + }; + + partition@4000000 { + /* 128KB for bank4 RCW Image */ + reg = <0x04000000 0x20000>; + label = "NOR bank4 RCW Image"; + }; + + partition@4020000 { + /* 63MB JFFS2 ROOT File System Image */ + reg = <0x04020000 0x3f00000>; + label = "NOR JFFS2 ROOT File System Image"; + }; + + partition@7f80000 { + /* 512KB for bank0 u-boot Image */ + reg = <0x07f80000 0x80000>; + label = "NOR bank0 u-boot Image"; + }; + }; +}; + +&lpuart0 { + status = "okay"; +}; + +&mdio0 { + phy0: ethernet-phy@0 { + reg = <0x0>; + }; + phy1: ethernet-phy@1 { + reg = <0x1>; + }; + phy2: ethernet-phy@2 { + reg = <0x2>; + }; + tbi1: tbi-phy@1f { + reg = <0x1f>; + device_type = "tbi-phy"; + }; +}; + +&pwm6 { + status = "okay"; +}; + +&pwm7 { + status = "okay"; +}; + +&qspi { + num-cs = <2>; + status = "okay"; + + qflash0: s25fl128s@0 { + compatible = "spansion,s25fl128s"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <20000000>; + reg = <0>; + + partition@0 { + label = "s25fl128s-0"; + reg = <0x0 0x1000000>; + }; + }; +}; |