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authorStephen Warren <swarren@nvidia.com>2012-07-25 20:02:44 (GMT)
committerArnd Bergmann <arnd@arndb.de>2012-07-25 20:09:16 (GMT)
commit01ad8063a5db9ac8320f197577a34b423ba64eca (patch)
tree2948876b8e4665e8bed186ddbf2ffd286c20764a /arch/arm/boot/dts/tegra20-trimslice.dts
parent04529fe2a298ca6b56c99188091ffe283dd31f6f (diff)
downloadlinux-fsl-qoriq-01ad8063a5db9ac8320f197577a34b423ba64eca.tar.xz
ARM: dt: tegra trimslice: add vbus-gpio property
On TrimSlice, Tegra's USB1 port may be routed to either an external micro USB port, or an internal USB->SATA bridge for SSD or HDD. This muxing is controlled by a GPIO. Whilst not strictly a VBUS GPIO, the TrimSlice board files caused this GPIO to be set appropriately to enable the SATA bridge by passing it as the VBUS GPIO to the USB driver. Echo this same configuration in device tree to enable the SATA bridge. An alternative might be to implement a full USB bus mux driver. However, that seems over-complex right now. Cc: <stable@vger.kernel.org> # v3.5 (file is named tegra-trimslice.dts there) Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-trimslice.dts')
-rw-r--r--arch/arm/boot/dts/tegra20-trimslice.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index 9de5636..25d2d8c 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -276,6 +276,7 @@
usb@c5000000 {
status = "okay";
+ nvidia,vbus-gpio = <&gpio 170 0>; /* gpio PV2 */
};
usb@c5004000 {