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author | Jingoo Han <jg1.han@samsung.com> | 2013-07-31 08:14:10 (GMT) |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2013-08-12 18:18:20 (GMT) |
commit | 4b1ced841b2e31470ae4bb47988891754ce4d8c7 (patch) | |
tree | 8fdf59944d73d9b946922e9d3c42239acce6aa8f /arch/arm/boot | |
parent | 5477a33b51b7282aca731213dc592b5f0c4e7c13 (diff) | |
download | linux-fsl-qoriq-4b1ced841b2e31470ae4bb47988891754ce4d8c7.tar.xz |
PCI: exynos: Split into Synopsys part and Exynos part
Exynos PCIe IP consists of Synopsys specific part and Exynos
specific part. Only core block is a Synopsys Designware part;
other parts are Exynos specific.
Also, the Synopsys Designware part can be shared with other
platforms; thus, it can be split two parts such as Synopsys
Designware part and Exynos specific part.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Pratyush Anand <pratyush.anand@st.com>
Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/exynos5440.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index ff7f5d8..586134e 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -248,6 +248,7 @@ #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0x0 0 &gic 53>; + num-lanes = <4>; }; pcie@2a0000 { @@ -267,5 +268,6 @@ #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0x0 0 &gic 56>; + num-lanes = <4>; }; }; |