Merge tag 'renesas-soc-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

From Simon Horman <horms+renesas@verge.net.au>:

Renesas ARM-based SoC updates for v3.10

* tag 'renesas-soc-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (43 commits)
  r8a7779: Add Display Unit clock support
  ARM: shmobile: R8A7779: use gic_iid() in SATA IRQ resource
  ARM: mach-shmobile: r8a7779: add SATA support
  ARM: mach-shmobile: r8a7779: SATA DT configuration
  ARM: shmobile: r8a7779: add Thermal support on DT
  ARM: shmobile: tidyup chip series definition order for r8a7740/r8a7779
  ARM: shmobile: r8a7779: use gic_iid macro
  ARM: shmobile: r8a7779: fixup DT machine name
  ARM: shmobile: r8a7779: fixup dtsi typo
  ARM: shmobile: add gic_iid macro for ICCIAR / interrupt ID
  ARM: mach-shmobile: r8a7740: Add DT names to clock list
  ARM: shmobile: Remove unused hotplug.c
  ARM: shmobile: Rearrange r8a7779 cpu hotplug code
  ARM: shmobile: Use sh73a0-specific cpu disable code
  ARM: shmobile: Update r8a7779 to use scu_power_mode()
  ARM: shmobile: Update r8a7779 to check SCU for hotplug
  ARM: shmobile: Use R8A7779_SCU_BASE with TWD
  ARM: shmobile: Rework SH73A0_SCU_BASE IOMEM() usage
  ARM: shmobile: Fix base address readout in headsmp-scu.S
  ARM: shmobile: r8a7779: Remove lan from dtsi
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

1 files changed, 98 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
new file mode 100644
index 0000000..fe5c6f2
--- /dev/null
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -0,0 +1,98 @@
+/*
+ * Device Tree Source for Renesas r8a7779
+ *
+ * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013 Simon Horman
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+	compatible = "renesas,r8a7779";
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <0>;
+		};
+		cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <1>;
+		};
+		cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <2>;
+		};
+		cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <3>;
+		};
+	};
+
+        gic: interrupt-controller@f0001000 {
+                compatible = "arm,cortex-a9-gic";
+                #interrupt-cells = <3>;
+                interrupt-controller;
+                reg = <0xf0001000 0x1000>,
+                      <0xf0000100 0x100>;
+        };
+
+	i2c0: i2c@0xffc70000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,rmobile-iic";
+		reg = <0xffc70000 0x1000>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 79 0x4>;
+	};
+
+	i2c1: i2c@0xffc71000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,rmobile-iic";
+		reg = <0xffc71000 0x1000>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 82 0x4>;
+	};
+
+	i2c2: i2c@0xffc72000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,rmobile-iic";
+		reg = <0xffc72000 0x1000>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 80 0x4>;
+	};
+
+	i2c3: i2c@0xffc73000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "renesas,rmobile-iic";
+		reg = <0xffc73000 0x1000>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 81 0x4>;
+	};
+
+	thermal@ffc48000 {
+		compatible = "renesas,rcar-thermal";
+		reg = <0xffc48000 0x38>;
+	};
+
+	sata: sata@fc600000 {
+		compatible = "renesas,rcar-sata";
+		reg = <0xfc600000 0x2000>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 100 0x4>;
+	};
+};