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author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-10-25 07:19:59 (GMT) |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-10-25 07:19:59 (GMT) |
commit | bdf4e9482360a3ddc1619efbd5d1c928ede8c3fa (patch) | |
tree | b02319e809c5b8abfca85409a11472775e27f597 /arch/arm/include/asm/cachetype.h | |
parent | 06afb1a087d49ae0f676b2e5b9ffe5f4b3aba355 (diff) | |
parent | eb0474544bc16a9dab53b26abd846e86ba814eb1 (diff) | |
download | linux-fsl-qoriq-bdf4e9482360a3ddc1619efbd5d1c928ede8c3fa.tar.xz |
Merge branch 'misc' into for-linus
Conflicts:
arch/arm/mach-integrator/integrator_ap.c
Diffstat (limited to 'arch/arm/include/asm/cachetype.h')
-rw-r--r-- | arch/arm/include/asm/cachetype.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/include/asm/cachetype.h b/arch/arm/include/asm/cachetype.h index c023db0..7ea7814 100644 --- a/arch/arm/include/asm/cachetype.h +++ b/arch/arm/include/asm/cachetype.h @@ -7,6 +7,7 @@ #define CACHEID_VIPT (CACHEID_VIPT_ALIASING|CACHEID_VIPT_NONALIASING) #define CACHEID_ASID_TAGGED (1 << 3) #define CACHEID_VIPT_I_ALIASING (1 << 4) +#define CACHEID_PIPT (1 << 5) extern unsigned int cacheid; @@ -16,6 +17,7 @@ extern unsigned int cacheid; #define cache_is_vipt_aliasing() cacheid_is(CACHEID_VIPT_ALIASING) #define icache_is_vivt_asid_tagged() cacheid_is(CACHEID_ASID_TAGGED) #define icache_is_vipt_aliasing() cacheid_is(CACHEID_VIPT_I_ALIASING) +#define icache_is_pipt() cacheid_is(CACHEID_PIPT) /* * __LINUX_ARM_ARCH__ is the minimum supported CPU architecture @@ -26,7 +28,8 @@ extern unsigned int cacheid; #if __LINUX_ARM_ARCH__ >= 7 #define __CACHEID_ARCH_MIN (CACHEID_VIPT_NONALIASING |\ CACHEID_ASID_TAGGED |\ - CACHEID_VIPT_I_ALIASING) + CACHEID_VIPT_I_ALIASING |\ + CACHEID_PIPT) #elif __LINUX_ARM_ARCH__ >= 6 #define __CACHEID_ARCH_MIN (~CACHEID_VIVT) #else |