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author | David Woodhouse <David.Woodhouse@intel.com> | 2012-10-09 14:03:21 (GMT) |
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committer | David Woodhouse <David.Woodhouse@intel.com> | 2012-10-09 14:04:25 (GMT) |
commit | ffe315012510165ce82e4dd4767f0a5dba9edbf7 (patch) | |
tree | f601cd980af9d0ced5ca9aedecef4fa0d2ca0e15 /arch/arm/include/debug | |
parent | e2d3a35ee427aaba99b6c68a56609ce276c51270 (diff) | |
parent | 4a8e43feeac7996b8de2d5b2823e316917493df4 (diff) | |
download | linux-fsl-qoriq-ffe315012510165ce82e4dd4767f0a5dba9edbf7.tar.xz |
Merge tag 'disintegrate-mtd-20121009' of git://git.infradead.org/users/dhowells/linux-headers
UAPI Disintegration 2012-10-09
Conflicts:
MAINTAINERS
arch/arm/configs/bcmring_defconfig
arch/arm/mach-imx/clk-imx51-imx53.c
drivers/mtd/nand/Kconfig
drivers/mtd/nand/bcm_umi_nand.c
drivers/mtd/nand/nand_bcm_umi.h
drivers/mtd/nand/orion_nand.c
Diffstat (limited to 'arch/arm/include/debug')
-rw-r--r-- | arch/arm/include/debug/highbank.S | 17 | ||||
-rw-r--r-- | arch/arm/include/debug/icedcc.S | 90 | ||||
-rw-r--r-- | arch/arm/include/debug/mvebu.S | 25 | ||||
-rw-r--r-- | arch/arm/include/debug/picoxcell.S | 35 | ||||
-rw-r--r-- | arch/arm/include/debug/socfpga.S | 16 | ||||
-rw-r--r-- | arch/arm/include/debug/vexpress.S | 84 |
6 files changed, 267 insertions, 0 deletions
diff --git a/arch/arm/include/debug/highbank.S b/arch/arm/include/debug/highbank.S new file mode 100644 index 0000000..8cad432 --- /dev/null +++ b/arch/arm/include/debug/highbank.S @@ -0,0 +1,17 @@ +/* + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + + .macro addruart,rp,rv,tmp + ldr \rv, =0xfee36000 + ldr \rp, =0xfff36000 + .endm + +#include <asm/hardware/debug-pl01x.S> diff --git a/arch/arm/include/debug/icedcc.S b/arch/arm/include/debug/icedcc.S new file mode 100644 index 0000000..43afcb0 --- /dev/null +++ b/arch/arm/include/debug/icedcc.S @@ -0,0 +1,90 @@ +/* + * arch/arm/include/debug/icedcc.S + * + * Copyright (C) 1994-1999 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + + @@ debug using ARM EmbeddedICE DCC channel + + .macro addruart, rp, rv, tmp + .endm + +#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) + + .macro senduart, rd, rx + mcr p14, 0, \rd, c0, c5, 0 + .endm + + .macro busyuart, rd, rx +1001: + mrc p14, 0, \rx, c0, c1, 0 + tst \rx, #0x20000000 + beq 1001b + .endm + + .macro waituart, rd, rx + mov \rd, #0x2000000 +1001: + subs \rd, \rd, #1 + bmi 1002f + mrc p14, 0, \rx, c0, c1, 0 + tst \rx, #0x20000000 + bne 1001b +1002: + .endm + +#elif defined(CONFIG_CPU_XSCALE) + + .macro senduart, rd, rx + mcr p14, 0, \rd, c8, c0, 0 + .endm + + .macro busyuart, rd, rx +1001: + mrc p14, 0, \rx, c14, c0, 0 + tst \rx, #0x10000000 + beq 1001b + .endm + + .macro waituart, rd, rx + mov \rd, #0x10000000 +1001: + subs \rd, \rd, #1 + bmi 1002f + mrc p14, 0, \rx, c14, c0, 0 + tst \rx, #0x10000000 + bne 1001b +1002: + .endm + +#else + + .macro senduart, rd, rx + mcr p14, 0, \rd, c1, c0, 0 + .endm + + .macro busyuart, rd, rx +1001: + mrc p14, 0, \rx, c0, c0, 0 + tst \rx, #2 + beq 1001b + + .endm + + .macro waituart, rd, rx + mov \rd, #0x2000000 +1001: + subs \rd, \rd, #1 + bmi 1002f + mrc p14, 0, \rx, c0, c0, 0 + tst \rx, #2 + bne 1001b +1002: + .endm + +#endif /* CONFIG_CPU_V6 */ diff --git a/arch/arm/include/debug/mvebu.S b/arch/arm/include/debug/mvebu.S new file mode 100644 index 0000000..865c6d0 --- /dev/null +++ b/arch/arm/include/debug/mvebu.S @@ -0,0 +1,25 @@ +/* + * Early serial output macro for Marvell SoC + * + * Copyright (C) 2012 Marvell + * + * Lior Amsalem <alior@marvell.com> + * Gregory Clement <gregory.clement@free-electrons.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000 +#define ARMADA_370_XP_REGS_VIRT_BASE 0xfeb00000 + + .macro addruart, rp, rv, tmp + ldr \rp, =ARMADA_370_XP_REGS_PHYS_BASE + ldr \rv, =ARMADA_370_XP_REGS_VIRT_BASE + orr \rp, \rp, #0x00012000 + orr \rv, \rv, #0x00012000 + .endm + +#define UART_SHIFT 2 +#include <asm/hardware/debug-8250.S> diff --git a/arch/arm/include/debug/picoxcell.S b/arch/arm/include/debug/picoxcell.S new file mode 100644 index 0000000..7419deb --- /dev/null +++ b/arch/arm/include/debug/picoxcell.S @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2011 Picochip Ltd., Jamie Iles + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit + * accesses to the 8250. + */ +#include <linux/serial_reg.h> + +#define UART_SHIFT 2 +#define PICOXCELL_UART1_BASE 0x80230000 +#define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000) + + .macro addruart, rp, rv, tmp + ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE) + ldr \rp, =PICOXCELL_UART1_BASE + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #UART_TX << UART_SHIFT] + .endm + + .macro busyuart,rd,rx +1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT] + and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE + teq \rd, #UART_LSR_TEMT | UART_LSR_THRE + bne 1002b + .endm + + /* The UART's don't have any flow control IO's wired up. */ + .macro waituart,rd,rx + .endm diff --git a/arch/arm/include/debug/socfpga.S b/arch/arm/include/debug/socfpga.S new file mode 100644 index 0000000..d6f26d2 --- /dev/null +++ b/arch/arm/include/debug/socfpga.S @@ -0,0 +1,16 @@ +/* + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + + .macro addruart, rp, rv, tmp + mov \rp, #DEBUG_LL_UART_OFFSET + orr \rp, \rp, #0x00c00000 + orr \rv, \rp, #0xfe000000 @ virtual base + orr \rp, \rp, #0xff000000 @ physical base + .endm + diff --git a/arch/arm/include/debug/vexpress.S b/arch/arm/include/debug/vexpress.S new file mode 100644 index 0000000..9f509f5 --- /dev/null +++ b/arch/arm/include/debug/vexpress.S @@ -0,0 +1,84 @@ +/* arch/arm/mach-realview/include/mach/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#define DEBUG_LL_PHYS_BASE 0x10000000 +#define DEBUG_LL_UART_OFFSET 0x00009000 + +#define DEBUG_LL_PHYS_BASE_RS1 0x1c000000 +#define DEBUG_LL_UART_OFFSET_RS1 0x00090000 + +#define DEBUG_LL_VIRT_BASE 0xf8000000 + +#if defined(CONFIG_DEBUG_VEXPRESS_UART0_DETECT) + + .macro addruart,rp,rv,tmp + + @ Make an educated guess regarding the memory map: + @ - the original A9 core tile, which has MPCore peripherals + @ located at 0x1e000000, should use UART at 0x10009000 + @ - all other (RS1 complaint) tiles use UART mapped + @ at 0x1c090000 + mrc p15, 4, \tmp, c15, c0, 0 + cmp \tmp, #0x1e000000 + + @ Original memory map + moveq \rp, #DEBUG_LL_UART_OFFSET + orreq \rv, \rp, #DEBUG_LL_VIRT_BASE + orreq \rp, \rp, #DEBUG_LL_PHYS_BASE + + @ RS1 memory map + movne \rp, #DEBUG_LL_UART_OFFSET_RS1 + orrne \rv, \rp, #DEBUG_LL_VIRT_BASE + orrne \rp, \rp, #DEBUG_LL_PHYS_BASE_RS1 + + .endm + +#include <asm/hardware/debug-pl01x.S> + +#elif defined(CONFIG_DEBUG_VEXPRESS_UART0_CA9) + + .macro addruart,rp,rv,tmp + mov \rp, #DEBUG_LL_UART_OFFSET + orr \rv, \rp, #DEBUG_LL_VIRT_BASE + orr \rp, \rp, #DEBUG_LL_PHYS_BASE + .endm + +#include <asm/hardware/debug-pl01x.S> + +#elif defined(CONFIG_DEBUG_VEXPRESS_UART0_RS1) + + .macro addruart,rp,rv,tmp + mov \rp, #DEBUG_LL_UART_OFFSET_RS1 + orr \rv, \rp, #DEBUG_LL_VIRT_BASE + orr \rp, \rp, #DEBUG_LL_PHYS_BASE_RS1 + .endm + +#include <asm/hardware/debug-pl01x.S> + +#else /* CONFIG_DEBUG_LL_UART_NONE */ + + .macro addruart, rp, rv, tmp + /* Safe dummy values */ + mov \rp, #0 + mov \rv, #DEBUG_LL_VIRT_BASE + .endm + + .macro senduart,rd,rx + .endm + + .macro waituart,rd,rx + .endm + + .macro busyuart,rd,rx + .endm + +#endif |