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authorIngo Molnar <mingo@elte.hu>2008-10-12 10:35:23 (GMT)
committerIngo Molnar <mingo@elte.hu>2008-10-12 10:37:32 (GMT)
commit365d46dc9be9b3c833990a06f3994b1987eda578 (patch)
tree9397d1304144a288411f2118707f44ff5e862fa6 /arch/arm/kernel/head.S
parent5dc64a3442b98eaa0e3730c35fcf00cf962a93e7 (diff)
parentfd048088306656824958e7783ffcee27e241b361 (diff)
downloadlinux-fsl-qoriq-365d46dc9be9b3c833990a06f3994b1987eda578.tar.xz
Merge branch 'linus' into x86/xen
Conflicts: arch/x86/kernel/cpu/common.c arch/x86/kernel/process_64.c arch/x86/xen/enlighten.c
Diffstat (limited to 'arch/arm/kernel/head.S')
-rw-r--r--arch/arm/kernel/head.S12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index bff4c6e..21e17dc 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -75,7 +75,6 @@
* circumstances, zImage) is for.
*/
.section ".text.head", "ax"
- .type stext, %function
ENTRY(stext)
msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
@ and irqs disabled
@@ -100,9 +99,9 @@ ENTRY(stext)
@ mmu has been enabled
adr lr, __enable_mmu @ return (PIC) address
add pc, r10, #PROCINFO_INITFUNC
+ENDPROC(stext)
#if defined(CONFIG_SMP)
- .type secondary_startup, #function
ENTRY(secondary_startup)
/*
* Common entry point for secondary CPUs.
@@ -128,6 +127,7 @@ ENTRY(secondary_startup)
adr lr, __enable_mmu @ return address
add pc, r10, #PROCINFO_INITFUNC @ initialise processor
@ (return control reg)
+ENDPROC(secondary_startup)
/*
* r6 = &secondary_data
@@ -136,6 +136,7 @@ ENTRY(__secondary_switched)
ldr sp, [r7, #4] @ get secondary_data.stack
mov fp, #0
b secondary_start_kernel
+ENDPROC(__secondary_switched)
.type __secondary_data, %object
__secondary_data:
@@ -151,7 +152,6 @@ __secondary_data:
* this is just loading the page table pointer and domain access
* registers.
*/
- .type __enable_mmu, %function
__enable_mmu:
#ifdef CONFIG_ALIGNMENT_TRAP
orr r0, r0, #CR_A
@@ -174,6 +174,7 @@ __enable_mmu:
mcr p15, 0, r5, c3, c0, 0 @ load domain access register
mcr p15, 0, r4, c2, c0, 0 @ load page table pointer
b __turn_mmu_on
+ENDPROC(__enable_mmu)
/*
* Enable the MMU. This completely changes the structure of the visible
@@ -187,7 +188,6 @@ __enable_mmu:
* other registers depend on the function called upon completion
*/
.align 5
- .type __turn_mmu_on, %function
__turn_mmu_on:
mov r0, r0
mcr p15, 0, r0, c1, c0, 0 @ write control reg
@@ -195,7 +195,7 @@ __turn_mmu_on:
mov r3, r3
mov r3, r3
mov pc, r13
-
+ENDPROC(__turn_mmu_on)
/*
@@ -211,7 +211,6 @@ __turn_mmu_on:
* r0, r3, r6, r7 corrupted
* r4 = physical page table address
*/
- .type __create_page_tables, %function
__create_page_tables:
pgtbl r4 @ page table address
@@ -325,6 +324,7 @@ __create_page_tables:
#endif
#endif
mov pc, lr
+ENDPROC(__create_page_tables)
.ltorg
#include "head-common.S"