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| author | Ulf Hansson <ulf.hansson@linaro.org> | 2013-05-15 19:48:23 (GMT) |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2013-05-22 23:09:15 (GMT) |
| commit | 9cc639a20fdc0b935e55d4992f93963f95233ca4 (patch) | |
| tree | b1a48ccf64e34f86f23d6ce944d6cfafbbb4723d /arch/arm/kernel/stacktrace.c | |
| parent | 0f3ed7f75cf1a16df9309f3a9ffaf62a3fc1f0bb (diff) | |
| download | linux-fsl-qoriq-9cc639a20fdc0b935e55d4992f93963f95233ca4.tar.xz | |
ARM: 7725/1: mmc: mmci: Cache MMCIDATACTRL register
Add a cache variable in the host struct that reflects the current data in
the MMCIDATACTRL register. This patch will not introduce any functional
change but instead provide an easy option to keep specific bits in the
register between each data transfer.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/stacktrace.c')
0 files changed, 0 insertions, 0 deletions