diff options
| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2012-02-22 16:50:54 (GMT) |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2012-02-23 08:26:41 (GMT) |
| commit | 8ff12ad3df62ee343d5f5ec29572b9d2c5c2cedd (patch) | |
| tree | 96a4c446fc380bffb040418beffbc3ba7cc438b1 /arch/arm/mach-at91/pm.c | |
| parent | 0dcfed1486739afdce053ebdccac28076e9d9e1f (diff) | |
| download | linux-fsl-qoriq-8ff12ad3df62ee343d5f5ec29572b9d2c5c2cedd.tar.xz | |
ARM: at91/pm_slowclock: function slow_clock() accepts parameters
Change slow_clock()/at91_slow_clock() prototype to accept the PMC
base address and one or two RAM controller addresses by parameters.
The r0, r1 and r2 registers are used differently and preserved during
function call.
Those values are defined in pm.c and slow_clock() function is called
from there with its new parameters.
This will allow to have a soc independent pm_slowclock.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Ached-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/pm.c')
| -rw-r--r-- | arch/arm/mach-at91/pm.c | 20 |
1 files changed, 17 insertions, 3 deletions
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index d554e67..aac00ce 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -188,13 +188,27 @@ int at91_suspend_entering_slow_clock(void) EXPORT_SYMBOL(at91_suspend_entering_slow_clock); -static void (*slow_clock)(void); +static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0, void __iomem *ramc1); #ifdef CONFIG_AT91_SLOW_CLOCK -extern void at91_slow_clock(void); +extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0, void __iomem *ramc1); extern u32 at91_slow_clock_sz; #endif +static void __iomem *at91_pmc_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_PMC); +#ifdef CONFIG_ARCH_AT91RM9200 +static void __iomem *at91_ramc0_base = (void __iomem*)AT91_VA_BASE_SYS; +#elif defined(CONFIG_ARCH_AT91SAM9G45) +static void __iomem *at91_ramc0_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_DDRSDRC0); +#else +static void __iomem *at91_ramc0_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_SDRAMC0); +#endif + +#if defined(CONFIG_ARCH_AT91SAM9G45) +static void __iomem *at91_ramc1_base = (void __iomem*)(AT91_VA_BASE_SYS + AT91_DDRSDRC1); +#else +static void __iomem *at91_ramc1_base = NULL; +#endif static int at91_pm_enter(suspend_state_t state) { @@ -232,7 +246,7 @@ static int at91_pm_enter(suspend_state_t state) /* copy slow_clock handler to SRAM, and call it */ memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz); #endif - slow_clock(); + slow_clock(at91_pmc_base, at91_ramc0_base, at91_ramc1_base); break; } else { pr_info("AT91: PM - no slow clock mode enabled ...\n"); |