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author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-04-18 17:07:43 (GMT) |
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committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-04-18 17:07:43 (GMT) |
commit | d5381e42f64ca19f05c5799ffae5708acb6ed411 (patch) | |
tree | 8b5e757a9847047102c475c6c583afc191d02e5b /arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h | |
parent | f030d60b30855e18ac5bf080fa9e576147623d18 (diff) | |
parent | b3c27b51db9112d03864fdef44fa611dd69c1425 (diff) | |
download | linux-fsl-qoriq-d5381e42f64ca19f05c5799ffae5708acb6ed411.tar.xz |
ASoC: Merge branch 'for-2.6.39' into for-2.6.40
Fix trivial conflict caused by silly spelling fix patch.
Conflicts:
sound/soc/codecs/wm8994.c
Diffstat (limited to 'arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h')
-rw-r--r-- | arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h b/arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h index e01fc46..0aeb6a6 100644 --- a/arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h +++ b/arch/arm/mach-bcmring/include/mach/csp/intcHw_reg.h @@ -109,9 +109,9 @@ #define INTCHW_INTC0_DMA0C0 (1<<INTCHW_INTC0_DMA0C0_BITNUM) /* INTC1 - interrupt controller 1 */ -#define INTCHW_INTC1_DDRVPMP_BITNUM 27 /* DDR and VPM PLL clock phase relationship interupt (Not for A0) */ +#define INTCHW_INTC1_DDRVPMP_BITNUM 27 /* DDR and VPM PLL clock phase relationship interrupt (Not for A0) */ #define INTCHW_INTC1_DDRVPMT_BITNUM 26 /* DDR and VPM HW phase align timeout interrupt (Not for A0) */ -#define INTCHW_INTC1_DDRP_BITNUM 26 /* DDR and PLL clock phase relationship interupt (For A0 only)) */ +#define INTCHW_INTC1_DDRP_BITNUM 26 /* DDR and PLL clock phase relationship interrupt (For A0 only)) */ #define INTCHW_INTC1_RTC2_BITNUM 25 /* Real time clock tamper interrupt */ #define INTCHW_INTC1_VDEC_BITNUM 24 /* Hantro Video Decoder interrupt */ /* Bits 13-23 are non-secure versions of the corresponding secure bits in SINTC bits 0-10. */ |