diff options
author | Kevin Hilman <khilman@deeprootsystems.com> | 2010-02-25 23:36:38 (GMT) |
---|---|---|
committer | Kevin Hilman <khilman@deeprootsystems.com> | 2010-05-06 22:02:01 (GMT) |
commit | 28552c2eae472a0a52d1cdb02eb32766c7f690e1 (patch) | |
tree | b996bede5ecde42ad8b95d99b494418b1acd2a90 /arch/arm/mach-davinci/gpio.c | |
parent | 66f41d4c5c8a5deed66fdcc84509376c9a0bf9d8 (diff) | |
download | linux-fsl-qoriq-28552c2eae472a0a52d1cdb02eb32766c7f690e1.tar.xz |
davinci: misc cleanups from sparse
- Convert data/functions to static
- include headers for missing declarations
- pointer cleanups: struct foo *__iomem f --> struct foo __iomem *f;
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/gpio.c')
-rw-r--r-- | arch/arm/mach-davinci/gpio.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c index 744755b..3f77062 100644 --- a/arch/arm/mach-davinci/gpio.c +++ b/arch/arm/mach-davinci/gpio.c @@ -24,14 +24,14 @@ static DEFINE_SPINLOCK(gpio_lock); struct davinci_gpio { struct gpio_chip chip; - struct gpio_controller *__iomem regs; + struct gpio_controller __iomem *regs; int irq_base; }; static struct davinci_gpio chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)]; /* create a non-inlined version */ -static struct gpio_controller __iomem * __init gpio2controller(unsigned gpio) +static struct gpio_controller __iomem __init *gpio2controller(unsigned gpio) { return __gpio_to_controller(gpio); } @@ -48,7 +48,7 @@ static int __init davinci_gpio_irq_setup(void); static int davinci_direction_in(struct gpio_chip *chip, unsigned offset) { struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip); - struct gpio_controller *__iomem g = d->regs; + struct gpio_controller __iomem *g = d->regs; u32 temp; spin_lock(&gpio_lock); @@ -70,7 +70,7 @@ static int davinci_direction_in(struct gpio_chip *chip, unsigned offset) static int davinci_gpio_get(struct gpio_chip *chip, unsigned offset) { struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip); - struct gpio_controller *__iomem g = d->regs; + struct gpio_controller __iomem *g = d->regs; return (1 << offset) & __raw_readl(&g->in_data); } @@ -79,7 +79,7 @@ static int davinci_direction_out(struct gpio_chip *chip, unsigned offset, int value) { struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip); - struct gpio_controller *__iomem g = d->regs; + struct gpio_controller __iomem *g = d->regs; u32 temp; u32 mask = 1 << offset; @@ -99,7 +99,7 @@ static void davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip); - struct gpio_controller *__iomem g = d->regs; + struct gpio_controller __iomem *g = d->regs; __raw_writel((1 << offset), value ? &g->set_data : &g->clr_data); } @@ -161,7 +161,7 @@ pure_initcall(davinci_gpio_setup); static void gpio_irq_disable(unsigned irq) { - struct gpio_controller *__iomem g = get_irq_chip_data(irq); + struct gpio_controller __iomem *g = get_irq_chip_data(irq); u32 mask = (u32) get_irq_data(irq); __raw_writel(mask, &g->clr_falling); @@ -170,7 +170,7 @@ static void gpio_irq_disable(unsigned irq) static void gpio_irq_enable(unsigned irq) { - struct gpio_controller *__iomem g = get_irq_chip_data(irq); + struct gpio_controller __iomem *g = get_irq_chip_data(irq); u32 mask = (u32) get_irq_data(irq); unsigned status = irq_desc[irq].status; @@ -186,7 +186,7 @@ static void gpio_irq_enable(unsigned irq) static int gpio_irq_type(unsigned irq, unsigned trigger) { - struct gpio_controller *__iomem g = get_irq_chip_data(irq); + struct gpio_controller __iomem *g = get_irq_chip_data(irq); u32 mask = (u32) get_irq_data(irq); if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) @@ -215,7 +215,7 @@ static struct irq_chip gpio_irqchip = { static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) { - struct gpio_controller *__iomem g = get_irq_chip_data(irq); + struct gpio_controller __iomem *g = get_irq_chip_data(irq); u32 mask = 0xffff; /* we only care about one bank */ @@ -276,7 +276,7 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset) static int gpio_irq_type_unbanked(unsigned irq, unsigned trigger) { - struct gpio_controller *__iomem g = get_irq_chip_data(irq); + struct gpio_controller __iomem *g = get_irq_chip_data(irq); u32 mask = (u32) get_irq_data(irq); if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) @@ -305,7 +305,7 @@ static int __init davinci_gpio_irq_setup(void) u32 binten = 0; unsigned ngpio, bank_irq; struct davinci_soc_info *soc_info = &davinci_soc_info; - struct gpio_controller *__iomem g; + struct gpio_controller __iomem *g; ngpio = soc_info->gpio_num; |